XRT75R12IB-F Exar Corporation, XRT75R12IB-F Datasheet - Page 63
![Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C](/photos/16/9/160975/xrt75r12_sml.jpg)
XRT75R12IB-F
Manufacturer Part Number
XRT75R12IB-F
Description
Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
Manufacturer
Exar Corporation
Datasheet
1.XRT75R12IB-F.pdf
(90 pages)
Specifications of XRT75R12IB-F
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
TBGA-420
Ic Interface Type
Parallel, Serial
Supply Voltage Range
3.135V To 3.465V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
BGA
No. Of Pins
420
Filter Terminals
SMD
Rohs Compliant
Yes
Data Rate Max
51.84Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.4
N
Reserved
UMBER
B
7,6
B
5
4
3
2
1
0
IT
IT
7
T
ABLE
Channel 5 Interrupt Enable
Channel 4 Interrupt Enable
Channel 3 Interrupt Enable
Channel 2 Interrupt Enable
Channel 1 Interrupt Enable
Channel 0 Interrupt Enable
23: C
Reserved
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
B
IT
HANNEL
6
Unused
N
AME
L
Channel 5
EVEL
Interrupt
Enable
B
R/W
IT
I
5
NTERRUPT
T
R/W
Channel 4
YPE
Interrupt
Enable
B
R/W
E
IT
NABLE
4
Channel n Interrupt Enable Bit:
This READ/WRITE bit is used to:
•
•
This is a "master" enable bit for each channel. This bit allows
control on a per channel basis to signal the Host of selected error
conditions.
If a bit is cleared, no interrupts from that channel will be sent to the
Host via the INT.
If the bit is set (logic 1), any generated interrupt in channel n that
has been enabled in the Interrupt Enable register (IERn) for the
channel will activate the INT pin to the Host.
0 - Disables all Channel n related Interrupts.
1 - Enables Channel n-related Interrupts. The user must enable
individual Channel n related Interrupts at the source level, before
they are can generate an interrupt.
To enable Channel n for Interrupt Generation at the Channel
Level
To disable all Interrupts associated with Channel n within the
XRT75R12
60
R
EGISTER
Channel 3
Interrupt
Enable
B
R/W
IT
3
- CR96 (A
Channel 2
Interrupt
Enable
B
R/W
D
IT
DDRESS
ESCRIPTION
2
L
Channel 1
OCATION
Interrupt
Enable
B
R/W
IT
1
= 0
XRT75R12
X
60)
Channel 0
Interrupt
Enable
B
R/W
IT
0