APA150-TQG100 Actel, APA150-TQG100 Datasheet - Page 156

• Manufacturer Part Number: APA150-TQG100
• Description: FPGA - Field Programmable Gate Array 150K System Gates
• Manufacturer: Actel

Specifications of APA150-TQG100

• Processor Series: APA150
• Core: IP Core
• Maximum Operating Frequency: 150 MHz
• Number Of Programmable I/os: 242
• Data Ram Size: 36864
• Supply Voltage (max): 2.7 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.3 V
• Number Of Gates: 150 K
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3 -7 2
ProASIC
Number
Pin
K10
K11
K12
K13
K14
K15
K16
K17
K18
K19
K20
K21
K22
K23
K24
K25
K26
K27
K28
K29
J27
J28
J29
J30
J31
J32
J33
J34
K1
K2
K3
K4
K5
K6
K7
K8
K9
1152-Pin FBGA
PLUS
Flash Family FPGAs
APA1000
Function
V
GND
GND
GND
V
V
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DD
DD
Number
K30
K31
K32
K33
K34
Pin
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
L31
L32
L1
L2
L3
L4
L5
L6
L7
L8
L9
1152-Pin FBGA
APA1000
Function
V
V
V
V
V
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
DD
DD
v5.9
Number
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
M21
M22
M23
M24
M25
M26
M27
M28
M29
M30
M31
M32
M33
M34
Pin
L33
L34
M1
M2
M3
M4
M5
M6
M7
M8
M9
N1
1152-Pin FBGA
APA1000
Function
GND
GND
V
V
V
V
V
V
V
V
GND
GND
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DDP
DDP
DDP
DDP
DDP
DDP
DD
DD
Number
N10
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
N26
N27
N28
N29
N30
N31
N32
N33
N34
Pin
N2
N3
N4
N5
N6
N7
N8
N9
P1
P2
P3
P4
1152-Pin FBGA
APA1000
Function
V
V
V
V
V
V
V
V
V
V
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD