AFS250-PQG208 Actel, AFS250-PQG208 Datasheet - Page 32

FPGA - Field Programmable Gate Array 250K System Gates

AFS250-PQG208

Manufacturer Part Number
AFS250-PQG208
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS250-PQG208

Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
93
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Device Architecture
Figure 2-15 • Example of Global Tree Use in an AFS600 Device for Clock Routing
2- 16
CCC
Global Resource Characteristics
AFS600 VersaNet Topology
Clock delays are device-specific.
global tree presented in
is used to drive all D-flip-flops in the device.
Figure 2-15
Figure 2-15
is driven by a CCC located on the west side of the AFS600 device. It
R e visio n 1
is an example of a global tree used for clock routing. The
Central
Global Rib
Global Spine
VersaTile
Rows

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