A3PE1500-FGG676 Actel, A3PE1500-FGG676 Datasheet - Page 7

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A3PE1500-FGG676

Manufacturer Part Number
A3PE1500-FGG676
Description
FPGA - Field Programmable Gate Array 1500K System Gates
Manufacturer
Actel
Datasheet

Specifications of A3PE1500-FGG676

Processor Series
A3PE1500
Core
IP Core
Maximum Operating Frequency
231 MHz
Number Of Programmable I/os
444
Data Ram Size
276480
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
1.5 M
Package / Case
FPBGA-676
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3PE1500-FGG676
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A3PE1500-FGG676
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
Part Number:
A3PE1500-FGG676I
Manufacturer:
Microsemi SoC
Quantity:
10 000
1 – ProASIC3E Device Family Overview
General Description
ProASIC3E, the third-generation family of Actel flash FPGAs, offers performance, density, and features
beyond those of the ProASIC
advantage of being a secure, low power, single-chip solution that is live at power-up (LAPU). ProASIC3E
is reprogrammable and offers time-to-market benefits at an ASIC-level unit cost. These features enable
designers to create high-density systems using existing ASIC or FPGA design flows and tools.
ProASIC3E devices offer 1 kbit of on-chip, programmable, nonvolatile FlashROM storage as well as
clock conditioning circuitry based on six integrated phase-locked loops (PLLs). ProASIC3E devices have
up to three million system gates, supported with up to 504 kbits of true dual-port SRAM and up to 620
user I/Os.
Several ProASIC3E devices support the Cortex-M1 soft IP cores, and the ARM-Enabled devices have
Actel ordering numbers that begin with M1A3PE.
Flash Advantages
Reduced Cost of Ownership
Advantages to the designer extend beyond low unit cost, performance, and ease of use. Unlike SRAM-
based FPGAs, flash-based ProASIC3E devices allow all functionality to be live at power-up; no external
boot PROM is required. On-board security mechanisms prevent access to all the programming
information and enable secure remote updates of the FPGA logic. Designers can perform secure remote
in-system reprogramming to support future design iterations and field upgrades with confidence that
valuable intellectual property (IP) cannot be compromised or copied. Secure ISP can be performed using
the industry-standard AES algorithm. The ProASIC3E family device architecture mitigates the need for
ASIC migration at higher user volumes. This makes the ProASIC3E family a cost-effective ASIC
replacement solution, especially for applications in the consumer, networking/ communications,
computing, and avionics markets.
Security
The nonvolatile, flash-based ProASIC3E devices do not require a boot PROM, so there is no vulnerable
external bitstream that can be easily copied. ProASIC3E devices incorporate FlashLock, which provides
a unique combination of reprogrammability and design security without external overhead, advantages
that only an FPGA with nonvolatile flash programming can offer.
ProASIC3E devices utilize a 128-bit flash-based lock and a separate AES key to secure programmed
intellectual property and configuration data. In addition, all FlashROM data in ProASIC3E devices can be
encrypted prior to loading, using the industry-leading AES-128 (FIPS192) bit block cipher encryption
standard. The AES standard was adopted by the National Institute of Standards and Technology (NIST)
in 2000 and replaces the 1977 DES standard. ProASIC3E devices have a built-in AES decryption engine
and a flash-based AES key that make them the most comprehensive programmable logic device security
solution available today. ProASIC3E devices with AES-based security allow for secure, remote field
updates over public networks such as the Internet, and ensure that valuable IP remains out of the hands
of system overbuilders, system cloners, and IP thieves. The contents of a programmed ProASIC3E
device cannot be read back, although secure design verification is possible.
Security, built into the FPGA fabric, is an inherent component of the ProASIC3E family. The flash cells
are located beneath seven metal layers, and many device design and layout techniques have been used
to make invasive attacks extremely difficult. The ProASIC3E family, with FlashLock and AES security, is
unique in being highly resistant to both invasive and noninvasive attacks. Your valuable IP is protected
and secure, making remote ISP possible. A ProASIC3E device provides the most impenetrable security
for programmable logic designs.
PLUS®
family. Nonvolatile flash technology gives ProASIC3E devices the
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