D2-24044-MR-T Intersil, D2-24044-MR-T Datasheet
D2-24044-MR-T
Specifications of D2-24044-MR-T
Related parts for D2-24044-MR-T
D2-24044-MR-T Summary of contents
Page 1
... Digital Audio Amplifier Power Stage D2-24044 The D2-24044 device is a high performance, integrated Class-D amplifier power stage. The four power stage outputs are configurable as four separate Half-Bridge outputs, as two Full-Bridge outputs, or combinations of Half-Bridge and Full-Bridge. Individual power stage overload monitoring, on-chip temperature monitoring, and common alert logic outputs provide protection to integrate with the final system’ ...
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... Ordering Information PART NUMBER (Notes 2, 3) D2-24044-MR D2-24044-MR D2-24044-MR-T (Note 1) D2-24044-MR NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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... IREF Pin.......................................................................................................................................... 11 OCFG0, OCFG1 Input Pins ................................................................................................................. 11 Protection.......................................................................................................................................... 11 Short-Circuit and Overcurrent Sensing ................................................................................................ 11 Thermal Protection and Monitoring ..................................................................................................... 12 Power Supply Voltage Monitoring ....................................................................................................... 12 Output Mode Configurations .............................................................................................................. 14 Typical Application Examples ............................................................................................................ 17 2-Channel Full Bridge Example........................................................................................................... 17 2.1-Channel Example........................................................................................................................ 18 4-Channel Half-Bridge Example.......................................................................................................... 19 Package Outline Drawing .................................................................................................................. 20 3 D2-24044 FN7678.0 September 3, 2010 ...
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... Logic Supply Undervoltage Threshold Hysteresis Logic Supply Undervoltage Glitch Rejection GATE DRIVE INTERNAL +5V BROWN-OUT DETECTION Gate Drive Supply Undervoltage Threshold 4 D2-24044 Thermal Information Thermal Resistance (Typical HTSSOP Package (Notes 4, 5) Maximum Storage Temperature . . . . . . . . -55°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www ...
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... THD, Half-Bridge, Load = 8Ω, HVDD[A:D] = 24V THD+N Load = 8Ω, Power = 25W, Bridged, 1kHz Load = 8Ω, Power = 1W, Bridged, 1kHz SNR Efficiency (Load = 8Ω) 5 D2-24044 = +25°C, PWMVDD = 3.3V ±10%. All grounds at 0.0V. TEST CONDITIONS T = +25°C, PWMVDD = 3.3V ±10%. All grounds at 0.0V. All voltages referenced to A ground ...
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... PWMVDD (+3.3V) through nominal 10kΩ resistor to select output configuration. Low-voltage ground. Connects to ground of circuitry providing PWM inputs. Both PWMGND and PWMGND2 are to tie together to the same ground. Low-voltage power. This 3.3V supply connects to the same system low-voltage power used for providing PWM inputs. ...
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... PWM Input. Routes to output channel, dependent on output configuration settings. Low-voltage ground. Connects to ground of circuitry providing PWM inputs. Both PWMGND and PWMGND2 are to tie together to the same ground. Overcurrent protection output, channel A output stage. Open drain, 16mA drive strength output with pull-up. Pulls low when active from overcurrent detection of output stage. ...
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... FREQUENCY (Hz) FIGURE 3. FREQUENCY RESPONSE, FULL-BRIDGE 8 D2-24044 Output stage A high voltage supply ground. A separate ground pin connection is provided for each of the output stages. All of the HGND[A:D] pins connect to system “HV” power ground (also see Note 8). Output stage A high voltage supply power. A separate power pin connection is provided for each of the output stages. All of the HVDD[A:D] pins and the VDDHV pin connect to the system “ ...
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... DC RESPONSE WITHOUT 4 DC BLOCKING CAPACITOR RESPONSE DUE TO LOUDSPEAKER DC BLOCKING CAPACITOR -8 -10 - 100 200 500 1k FREQUENCY (Hz) FIGURE 7. FREQUENCY RESPONSE, HALF-BRIDGE 9 D2-24044 1.000 0.500 0.200 0.100 0.050 0.020 0.010 0.005 HVDD = 24.0V, 8Ω LOAD, 0.002 2.4W POWER OUT 0.001 FIGURE 6. THD vs FREQUENCY, HALF-BRIDGE -30 -35 ...
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... FET nERROR OVERCURRENT FIGURE 9. OUTPUT STAGE Output Options The D2-24044 devices provide four configuration options for the outputs. These options are selected by strapping the OCFG0 and OCFG1 pins high or low. These defined configurations include: • 2 Channels of Full Bridge, 4-Quadrant Outputs, • 2 Channels of Full Bridge, 2-Quadrant Outputs • ...
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... Refer to “Output Mode Configurations” on page 14 for additional reference and definition. Protection The D2-24044 device includes monitors for protection of the system as well as the device itself. Certain levels of protection are managed on-chip, as shown in Figure 10. Other protection is integrated at the system level ...
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... The higher high-temperature threshold (over-temp) is set at approximately +140°C. 12 D2-24044 Power Supply Voltage Monitoring Undervoltage monitors are included for the output drive (HVDD) supply voltage, the on-chip generated gate drive (REG5V) supply voltage, and the low-level PWMVDD supply voltage ...
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... Over-Current (OC) Shutdown: OC detect condition is latched, shutting down output. Latched shutdown is then cleared after over-current condition has cleared, AND PWM data clocking has stopped from PWM controller. FIGURE 10. PROTECTION AND MONITORING HIGH-LEVEL FUNCTIONAL OPERATION 13 D2-24044 Over-Current Warning Detected (OUTA) Over-Current Warning Detected ...
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... Settings are chosen based on the output configuration and topology of the design. Their connection hard-connected on the design, and they are not intended to be dynamic or subject to change during system operation. TABLE 1. D2-24044 CONFIGURATION PWM AND OUTPUT CHANNEL ASSIGNMENTS CONFIG PINS CONFIGURATION OCFG1 OCFG0 CONFIG ...
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... PWMIN2-LO PWM5 PWM6 PWM7 PWM8 PWM Inputs From PWM1-8 PWM/System Controller Input Pins FIGURE 12. CONFIGURATION “01” PWM INPUT-TO-OUTPUT POWER STAGE MAPPING 15 D2-24044 PWM Input Mapping To Output Stages Configuration “00” 4-Quadrant Full-Bridge Outputs (HVDD) (HVDD) High High Side Side FET ...
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... PWM Input PWM8 PWMIN4-LO PWM Inputs From PWM1-8 PWM/System Controller Input Pins FIGURE 14. CONFIGURATION “11” PWM INPUT-TO-OUTPUT POWER STAGE MAPPING 16 D2-24044 PWM Input Mapping To Output Stages Configuration “10” Half-Bridge Outputs + 1 x Full Bridge Output (HVDD) (HVDD) High High Side ...
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... Typical Application Examples These examples show functional circuit examples of typical applications using the D2-24044 device. (Note: These examples are provided to show typical applications only and are not intended to represent complete production-qualified reference designs.) nPDN Configuration “01” 2x Full Bridge Outputs PWMVDD/+3.3 ...
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... HVDDB 9 PWM3 REG5V 10 PWM4 VDDHV 11 PWM5 IREF 12 PWM6 HVDDC 13 PWM7 HGNDC 14 PWM8 OUTC 15 PWMGND2 HSBSC 16 HSBSD 17 OUTD HGNDD HVDDD D2-24044 Half Bridge 38 +HV 37 Output +HV GND Filter 36 Bias 35 Channel 1 34 Half Bridge 33 Output 32 +HV GND Filter Bias 31 +HV Channel 2 30 +HV 29 0.1u ...
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... PWM2 HVDDB 9 PWM3 REG5V 10 PWM4 VDDHV 11 PWM5 12 PWM6 HVDDC 13 PWM7 HGNDC 14 PWM8 15 PWMGND2 HSBSC 16 HSBSD 17 HGNDD HVDDD D2-24044 FIGURE 17. 4-CHANNEL HALF BRIDGE EXAMPLE www.intersil.com/product_tree www.intersil.com/design/quality Half Bridge 38 +HV 37 +HV GND 36 Bias OUTA 35 34 Half Bridge 33 OUTB 32 +HV GND Bias 31 + ...
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... LEAD HEAT-SINK THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE (HTSSOP) Rev 0, 4/ 0.17-0.27 TOP VIEW 0.05 C 0.50 4 9.70±0.10 SIDE VIEW (4.60) (5.80) (36X 0.50) TYPICAL RECOMMENDED LAND PATTERN 20 D2-24044 PIN 1 ID 0.09-0. 6.4 4.4±0.10 4 0. N/2 TIPS SEE DETAIL "A" END VIEW 1 ...