74LVC8T245BQ,118 NXP Semiconductors, 74LVC8T245BQ,118 Datasheet - Page 12

• Manufacturer Part Number: 74LVC8T245BQ,118
• Description: TXRX 8BIT TRANSLATING DHVQFN24
• Manufacturer: NXP Semiconductors

Specifications of 74LVC8T245BQ,118

• Logic Family: 74LVC
• Number Of Channels Per Chip: 2
• Propagation Delay Time: 5.4 ns, 8.9 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.2 V
• Maximum Operating Temperature: + 125 C
• Package / Case: DHVQFN-24
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5279-2

NXP Semiconductors
Table 12.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
74LVC_LVCH8T245
Product data sheet
Symbol Parameter
V
t
t
t
V
t
t
t
V
t
t
t
V
t
t
t
V
t
t
t
pd
dis
en
pd
dis
en
pd
dis
en
pd
dis
en
pd
dis
en
CC(A)
CC(A)
CC(A)
CC(A)
CC(A)
t
pd
is the same as t
= 1.5 V  0.1 V
= 1.8 V  0.15 V
= 2.5 V  0.2 V
= 3.3 V  0.3 V
= 5.0 V  0.5 V
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
Dynamic characteristics for temperature range 40 C to +125 C
PLH
and t
Conditions
An to Bn
Bn to An
OE to An
OE to Bn
OE to An
OE to Bn
An to Bn
Bn to An
OE to An
OE to Bn
OE to An
OE to Bn
An to Bn
Bn to An
OE to An
OE to Bn
OE to An
OE to Bn
An to Bn
Bn to An
OE to An
OE to Bn
OE to An
OE to Bn
An to Bn
Bn to An
OE to An
OE to Bn
OE to An
OE to Bn
PHL
; t
dis
is the same as t
All information provided in this document is subject to legal disclaimers.
1.5 V  0.1 V 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V
Min
1.7
0.9
1.5
2.4
0.4
1.8
1.7
0.9
1.5
2.4
0.4
1.8
1.5
1.2
1.4
2.3
1.0
1.7
1.5
0.8
1.6
2.1
0.8
1.8
1.5
0.7
0.3
2.0
0.7
1.5
Rev. 2 — 11 February 2011
PLZ
Max
17.2
12.2
14.1
10.9
9.4
32
32
34
41
40
43
30
27
34
40
28
41
28
23
13
37
38
28
18
36
37
26
16
36
37
and t
PHZ
74LVC8T245; 74LVCH8T245
Min
1.7
0.9
1.5
2.4
0.4
1.8
0.9
1.5
2.4
0.4
1.8
1.2
1.4
1.7
1.5
2.1
1.8
1.5
2.0
1.5
1.7
1.5
2.3
1.0
0.8
1.6
0.8
0.7
0.3
0.7
; t
en
is the same as t
Figure
8-bit dual supply translating transceiver; 3-state
Max
25.9
28.8
33.6
36.2
25.4
13.3
33.6
17.2
32.2
25.2
12.2
14.1
31.7
25.4
32.7
10.9
31.6
11.2
9.4
27
30
34
40
40
41
28
40
13
33
11
7; for wave forms see
Min
1.3
0.8
1.5
1.9
0.4
1.5
1.3
0.8
1.5
1.9
0.4
1.5
1.2
1.0
1.4
1.8
1.0
1.5
1.1
0.8
1.6
1.7
0.8
1.4
1.0
0.4
0.3
1.6
0.7
1.3
V
PZL
CC(B)
[1]
and t
Max
13.2
27.6
33.4
17.1
27.8
13.1
17.3
18.1
12.8
10.2
12.2
14.3
13.6
18.4
12.8
13.7
10.9
18.4
8.8
9.4
21
28
34
18
40
22
20
13
13
15
PZH
.
Min
1.0
0.7
1.5
1.7
0.4
1.2
1.0
0.7
1.5
1.7
0.4
1.2
0.8
1.0
1.4
1.7
1.0
1.2
0.8
0.7
1.6
1.5
0.8
1.1
0.7
0.3
0.3
1.4
0.7
1.0
Figure 5
Max
27.4
33.3
16.0
27.7
16.6
10.2
12.9
14.3
17.2
14.1
10.3
10.1
12.2
12.6
13.2
12.9
10.9
13.7
11.4
8.5
9.4
18
28
34
17
40
18
13
10
12
© NXP B.V. 2011. All rights reserved.
and
Min
0.8
0.7
1.4
1.3
0.4
0.9
0.7
1.4
1.3
0.4
0.9
0.9
1.4
1.0
1.0
0.5
0.6
1.6
0.8
0.8
0.9
0.4
0.7
0.7
0.9
0.8
0.6
0.9
0.3
0.3
Figure
Max
27.4 ns
33.2 ns
14.3 ns
27.7 ns
14.8 ns
12.8 ns
10.9 ns
17.3 ns
10.4 ns
12.2 ns
10.3 ns
13.6 ns
10.9 ns
10.9 ns
10.7 ns
11.1 ns
11.2 ns
8.8
8.2
8.3
9.4
9.7
16
26
34
15
40
16
13
10
6.
12 of 28
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns