74LVC8T245BQ,118 NXP Semiconductors, 74LVC8T245BQ,118 Datasheet - Page 3

TXRX 8BIT TRANSLATING DHVQFN24

74LVC8T245BQ,118

Manufacturer Part Number
74LVC8T245BQ,118
Description
TXRX 8BIT TRANSLATING DHVQFN24
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC8T245BQ,118

Logic Family
74LVC
Number Of Channels Per Chip
2
Propagation Delay Time
5.4 ns, 8.9 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Package / Case
DHVQFN-24
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5279-2
NXP Semiconductors
5. Pinning information
74LVC_LVCH8T245
Product data sheet
Fig 2.
Fig 3.
Logic diagram (one channel)
Pin configuration SOT355-1 (TSSOP24)
V
CC(A)
GND
GND
DIR
A1
A2
A3
A4
A5
A6
A7
A8
10
11
12
1
2
3
4
5
6
7
8
9
5.1 Pinning
74LVCH8T245
74LVC8T245
001aak436
DIR
All information provided in this document is subject to legal disclaimers.
A1
24
23
22
21
20
19
18
17
16
15
14
13
V
V
OE
B1
B2
B3
B4
B5
B6
B7
B8
GND
CC(B)
CC(B)
V
CC(A)
Rev. 2 — 11 February 2011
to other seven channels
74LVC8T245; 74LVCH8T245
Fig 4.
8-bit dual supply translating transceiver; 3-state
(1) This is not a supply pin, the substrate is attached to this
V
index area
CC(B)
terminal 1
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad
however if it is soldered the solder land should remain
floating or be connected to GND.
Pin configuration SOT815-1 (DHVQFN24)
001aai473
GND
DIR
A1
A2
A3
A4
A5
A6
A7
A8
OE
B1
10
11
2
3
4
5
6
7
8
9
Transparent top view
74LVCH8T245
74LVC8T245
GND
(1)
© NXP B.V. 2011. All rights reserved.
23
22
21
20
19
18
17
16
15
14
001aak437
V
OE
B1
B2
B3
B4
B5
B6
B7
B8
CC(B)
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