RC28F256P33TFA NUMONYX, RC28F256P33TFA Datasheet - Page 13

• Manufacturer Part Number: RC28F256P33TFA
• Description: IC FLASH 256MBIT 95NS 64EZBGA
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of RC28F256P33TFA

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 256M (16Mx16)
• Speed: 95ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-EZBGA
• Cell Type: NOR
• Density: 256Mb
• Interface Type: Parallel/Serial
• Boot Type: Top
• Address Bus: 25b
• Operating Supply Voltage (typ): 2.5/3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: EZBGA
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 32M
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 902063; 902063; RC28F256P33TF 902063

Conversion Guide: P33 130nm to 65nm
5.4
Table 8:
Note:
5.5
5.5.1
Application Note
13
During Buffered Program command (E8h) sequence, if a read of the Main Array Data needs to be performed during the
loading of the program buffer, then a write to an address outside of current block will abort the Buffer Programming
Operation. Issuing the Read Array command (FFh) will put the device into Read Array mode. After Main Array read
operation has been completed, the Buffer Program Operation must be restarted.
Read Array
Read Status Register
Clear Status Register
Read Device Information
CFI Query
Word Program
Buffered Program
Buffered Enhanced Factory Program
Block Erase
Program/Erase Suspend
Program/Erase Resume
Blank Check
Lock Block
Unlock Block
Lock Down Block
Password Access
Program Read Configuration Register
Program OTP Register
Command Bus Operations
Device Commands
The command set for the P33 65nm and P33 130nm devices are fully compatible.
However, the P33 65nm device includes new features such as the blank check operation
and the enhanced configuration operation. Command set operations are compared
here:
WAIT State Comparison
This section will compare the difference between the WAIT states on the P33 130nm
and the P33 65nm.
WAIT State P33 65nm
End of wordline (EOWL) WAIT states can result when the starting address of the burst
operation is not aligned to a 16-word boundary; that is, A[3:0] of start address does
not equal 0x0.
end of wordline WAIT state(s), which occur after the first 16-word boundary is reached.
The number of data words and the number of WAIT states for both P33 130nm and P33
65nm are summarized in
on page
Command
14.
Figure 3, “End of Wordline Timing Diagram” on page 14
Table 9, “End of Wordline Data and WAIT State Comparison”
P33 130nm Code
(Setup/Confirm)
00E8h/00D0h
0080h/00D0h
0020h/00D0h
0060h/0001h
0060h/00D0h
0060h/0003h
0060h/002Fh
0070h
00B0h
00D0h
00C0h
00FFh
0050h
0090h
0098h
0040h
N/A
N/A
Order Number: 320005-04
(Setup/Confirm)
P33 65nm Code
00BCh/00D0h
00E8h/00D0h
0080h/00D0h
0020h/00D0h
0060h/00D0h
0060h/0001h
0060h/002Fh
0060h/0003h
00D0h
00C0h
illustrates the
0070h
0050h
0090h
0098h
0040h
00B0h
00EBh
00FFh
Sep 2008