EVL90WADP-LLCSR STMicroelectronics, EVL90WADP-LLCSR Datasheet - Page 33

EVAL BOARD PORTABLE PWR SUPPLY

EVL90WADP-LLCSR

Manufacturer Part Number
EVL90WADP-LLCSR
Description
EVAL BOARD PORTABLE PWR SUPPLY
Manufacturer
STMicroelectronics
Type
Power Factor Correctionr

Specifications of EVL90WADP-LLCSR

Main Purpose
AC/DC, Primary and Secondary Side with PFC
Outputs And Type
1, Isolated
Power - Output
90W
Voltage - Output
19V
Current - Output
4.75A
Voltage - Input
90 ~ 264VAC
Regulator Topology
Boost
Frequency - Switching
130kHz
Board Type
Fully Populated
Utilized Ic / Part
L6563H, L6599A, SRK2000
Input Voltage
90 V to 264 V
Output Voltage
19 V
Dimensions
65 mm x 155 mm
Product
Power Management Modules
Supply Current
4.75 A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
L6563H, L6599A, SRK2000
Other names
497-10377
L6563H
Application information
Figure 46. Interface circuits that let dc-dc converter's controller IC drive L6563H in
burst mode
The third communication line is the pin PWM_STOP (#11), which works in conjunction with
the pin RUN (#12). The purpose of the PWM_STOP pin is to inhibit the PWM activity of both
the PFC stage and the cascaded dc-dc converter. The pin is an open collector, normally
open, that goes low if the device is disabled by a voltage lower than 0.8 V on the RUN pin.
The pin goes again open if the voltage on pin RUN exceeds 0.88 V. It is important to point
out that this function works correctly in systems where the PFC stage is the master and the
cascaded dc-dc converter is the slave or, in other words, where the PFC stage starts first,
powers both controllers and enables/disables the operation of the dc-dc stage. The pin RUN
can be used to start and stop the main converter. In the simplest case, to enable/disable the
PWM controller the pin PWM_STOP can be connected to the output of the error amplifier
(
Figure 47
a).
Figure 47. Interface circuits that let the L6563H switch on or off a PWM controller
If the chip is provided with a soft-start pin, it is possible to delay the start-up of the dc-dc
stage with respect to that of the PFC stage, which is often desired, as described in
Figure 48
. An underlying assumption in order for that to work properly is that the UVLO
thresholds of the PWM controller are certainly higher than those of the L6563H.
Doc ID 16047 Rev 3
33/49

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