ADXL180WCPZ-RL Analog Devices Inc, ADXL180WCPZ-RL Datasheet - Page 28

IC ACCELEROMETER CONFIG 16-LFCSP

ADXL180WCPZ-RL

Manufacturer Part Number
ADXL180WCPZ-RL
Description
IC ACCELEROMETER CONFIG 16-LFCSP
Manufacturer
Analog Devices Inc
Series
iMEMS®r
Datasheet

Specifications of ADXL180WCPZ-RL

Axis
X or Y
Acceleration Range
±50g, 100g, 150g, 200g, 250g, 350g, 500g
Voltage - Supply
5 V ~ 14.5 V
Output Type
Analog
Bandwidth
100Hz ~ 800Hz Selectable
Mounting Type
Surface Mount
Package / Case
16-LFQFN, CSP Exposed Pad
Package Type
LFCSP EP
Operating Supply Voltage (min)
5V
Operating Temperature (min)
-40C
Operating Temperature (max)
125C
Operating Temperature Classification
Automotive
Product Depth (mm)
5mm
Product Height (mm)
1.43mm
Product Length (mm)
5mm
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Interface
-
Lead Free Status / Rohs Status
Compliant
Other names
ADXL180WCPZ-RLCT
ADXL180
APPLICATION LAYER: COMMUNICATION PROTOCOL STATE MACHINE
Table 21. ADXL180 Start-Up Sequence Summary
Name
Function
Data Type
Transmitted
ADXL180 STATE MACHINE
After power is applied and stabilized, the ADXL180 follows a
five-phase start-up sequence. The basic function of each phase
is fixed as shown in Figure 22. The five phases and the function
modes available in each phase are detailed in the following
sections.
RESET
RESET
RESET
RESET
RESET
AUTO-ZERO INITIALIZATION
Figure 22. ADXL180 Start-Up Sequence
PHASE 1 INITIALIZATION
NORMAL OPERATION
Phase 1
Initialization
Power-on reset
None
DEVICE DATA
RESET
SELF-TEST
PHASE 4
PHASE 5
PHASE 2
PHASE 3
RESET
V
DD
> V
PUR
TRANSMIT ERROR CODE
ERROR
ERROR
ERROR
ERROR
ERROR STATE
Phase 2 Device Data
None
Serial number,
configuration and range
Rev. A | Page 28 of 60
Phase 3 Self-Test
Sequence self-test
pattern
Sensor, range, device OK
or delimiter
PHASE 1: POWER-ON-RESET INITIALIZATION
The power-on-reset initialization period is typically 100 ms
long. It is the period of time from when the internal reset signal
is deasserted until the beginning of Phase 2. This time allows
for circuit stabilization and entry into configuration mode. No
data is transmitted during Phase 1. No errors are reported
during Phase 1. Additionally, until phase 1 is exited, the device
does not respond to a transmitted sync pulse (see Table 21).
PHASE 2: DEVICE DATA TRANSMISSION
Overview
The device data consists of the serial number and configuration
data. Device data is transmitted during Phase 2. This data can
be transmitted in one of four configurable modes (see Table 22).
These modes are described in detail in the following sections.
The parity of all OTP memory blocks is continuously monitored
(provided that the block has been programmed) beginning at
the end of Phase 2. See the Parity Encoding section for more
details.
Table 22. MD Phase 2 Device Data Mode Select Codes
MD1
0
0
1
1
During Phase 2, if Mode 0, Mode 1, or Mode 2 is selected, the
device data is 8-bit data. If the 10-bit data mode is selected in
combination with Phase 2 Mode 0, Mode 1, or Mode 2, the 8-bit
device data is left justified in the 10-bit data field. The two LSBs
are held at zero (see Table 24).
MD0
0
1
0
1
Name
Mode 0
Mode 1
Mode 2
Mode 3
Phase 4 Auto-Zero
Initialization
Fast auto-zero
Sensor
Definition
ADIFX mode device data (default)
Range data only (range selection
limited)
8-bit coded device data
10-bit coded device data
Phase 5
Run Time
Slow auto-
zero
Sensor

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