ADXL180WCPZ-RL Analog Devices Inc, ADXL180WCPZ-RL Datasheet - Page 6

• Manufacturer Part Number: ADXL180WCPZ-RL
• Description: IC ACCELEROMETER CONFIG 16-LFCSP
• Manufacturer: Analog Devices Inc
• Series: iMEMS®r

Specifications of ADXL180WCPZ-RL

• Axis: X or Y
• Acceleration Range: ±50g, 100g, 150g, 200g, 250g, 350g, 500g
• Voltage - Supply: 5 V ~ 14.5 V
• Output Type: Analog
• Bandwidth: 100Hz ~ 800Hz Selectable
• Mounting Type: Surface Mount
• Package / Case: 16-LFQFN, CSP Exposed Pad
• Package Type: LFCSP EP
• Operating Supply Voltage (min): 5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 125C
• Operating Temperature Classification: Automotive
• Product Depth (mm): 5mm
• Product Height (mm): 1.43mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sensitivity: -
• Interface: -
• Lead Free Status / Rohs Status: Compliant
• Other names: ADXL180WCPZ-RLCT

ADXL180
Parameter
ASYNCHRONOUS MODE TIMING
SYNCHRONOUS MODE TIMING
CLOCK
PSRR
POWER SUPPLY HOLDUP TIME
THERMAL RESISTANCE, JUNCTION
1
2
3
4
All parameters are specified using the application circuit shown in Figure 6. C
All timing is driven from the on-chip master clock.
t
Transmission timing is defined by the internal system clock in asynchronous mode and by the synchronization pulse period in synchronous mode.
ST
Message Transmission Period
Self-Test State (Phase 3)
Period
Initialization State (Phase 1)
Device Data State (Phase 2)
Auto-Zero Initialization State
Message Transmission Period
Initialization State1 (Phase 1)
Device Data State (Phase 2)
Self-Test State (Phase 3)
Self-Test Time
Self-Test Interval
Self-Test Cycle
Auto-Zero Initialization State
TO CASE
and t
Phase 2, Mode 0
All Other Phases and Modes
Mode 0
Mode 1
Mode 2
Mode 3
Self-Test Time
Self-Test Interval
Self-Test Cycle
(Phase 4)
Mode 0
Mode 1
Mode 2
Mode 3
(Phase 4)
STS
2
are the times for six self-test cycles. This is the maximum number of cycles in the internal self-test mode.
1
3
3
4
2
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
θ
PM0
P
I
DD0
DD1
DD2
DD3
ST
STI
STC
AZ
PS
I
DD0s
DD1s
DD2s
DD3s
STS
STIS
STCS
AZs
CLK
JC
Min
1.05
Typ
456
228
100
4.10
109
109
117
394
21.9
65.7
14.94
N/A
100
9 × t
480 × t
480 × t
512 × t
1728 × t
96 × t
288 × t
65,535 × t
1.0
<1
500
30
PS
Rev. A | Page 6 of 60
PS
PS
PS
PS
PS
PS
B
= 10 nF, C
PS
Max
0.95
VDD
= 100 nF.
Unit
μs
μs
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
sec
μs
LSB
°C/W
ms
sec
ms
ms
ns
Test Conditions/Comments
ADIFX compatible
See Figure 28
See Figure 28
See Figure 28
Determined by sync pulse, See Figure 14,
minimum t
f
8-bit LSB; test conditions: V
V
@ I
CLK
AC
BUS
= 1/t
= 500 mV p-p, 100 kHz to 1.1 MHz
= I
CLK
SIG
PS
= t
SPD
+ t
STD
+ t
BP
M
+ t
− V
B
BN
= 7.00 V,