M25P80-VMN6P NUMONYX, M25P80-VMN6P Datasheet - Page 55

• Manufacturer Part Number: M25P80-VMN6P
• Description: MEMORY, FLASH, SERIAL, 8MB, 8NSOIC
• Manufacturer: NUMONYX

Specifications of M25P80-VMN6P

• Memory Size: 8Mbit
• Clock Frequency: 75MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: NSOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Package / Case: NSOIC
• Memory Type: Flash
• Memory Configuration: 1M X 8
• Interface Type: Serial, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 24.
22-Sep-2006
15-Dec-2006
10-Dec-2007
12-Oct-2006
09-Jan-2007
15-Jun-2007
3-July 2008
5-Dec-2008
Date
Document revision history
Revision
12
13
14
15
16
11
17
18
Endurance and data retention information added to Features.
50 MHz frequency added,
Instruction times
characteristics (40 MHz operation, Grade 6) and
characteristics (25MHz
in Table 15: AC characteristics (40 MHz operation, Grade 6) and
added.
VFQFPN8 package specifications updated (see
changes. Process Technology information added to part numbering (see
Table 22: Ordering information
V
Data in
data. t
Small text changes. Hardware Write protection added to Features.
VCC supply voltage
memory devices on the SPI bus
by an explanatory paragraph.
Behavior of WIP bit specified at Power-up in
Power-down.
T
SO8W and VFQFPN8 package specifications updated (see
Package
Temperature grade 3 added (available in products delivered in the SO8N
package only).
Read Identification instruction modified in
(RDID).
Inserted UID and CFI content columns in
(RDID) data-out
Modified Data bytes for RDID instruction in
Modified Q signal in
sequence and data-out
Modified Test condition and maximum value for I
characteristics.
Table 15: AC characteristics (40 MHz operation, Grade 6) removed.
Modified the maximum value for f
(75 MHz
Applied Numonyx branding.
Added a reference to customer’s ability to request dedicated part number
in
Moved specifications in “max” column to “min” column and changed the
“min” for grade 3 to 10,000 in
page
Deleted “grade 6” reference in
operation) on page
Deleted “grade 3” reference and “preliminary note” in
characteristics (25 MHz operation) on page
Revised
Added the PDIP8 (BA), 300 mils width package information.
LEAD
IO
Section 6.3: Read Identification (RDID) on page
max changed in
39.
BE
added to
Table 15: AC characteristics (75 MHz operation)
Section 12: Ordering Information, Standard Parts on page
operation).
typ and f
mechanical). Revised
Table 9: Absolute maximum
sequence.
table removed, data appended to Table 15: AC
R
41.
modified in
and
Figure 9: Read Identification (RDID) instruction
Table 9: Absolute maximum
operation). Typical t
sequence.
VSS ground
Read Identification (RDID)
Table 11: Data retention and endurance on
Table 15: AC characteristics (75 MHz
scheme).
Table
Table 22: Ordering information
Changes
updated, Note 2 removed and replaced
C
in
15.
added.
Table 15: AC characteristics
Table 5: Read Identification
Section 6.3: Read Identification
W
Table 4: Instruction
43.
ratings.
, t
Section 7: Power-up and
Figure 3: Bus Master and
SE
Table
CC3
Table
ratings.
and t
21.
in
Table 16: AC
instruction added,
17). Small text
PP
16.
Table 14: DC
are preliminary
values modified
AC
Section 11:
scheme.
set.
Note 1
52.
55/57