PIC16LF1827-I/MV Microchip Technology, PIC16LF1827-I/MV Datasheet - Page 206
![IC, 8BIT MCU, PIC16LF, 32MHZ, QFN-28](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC16LF1827-I/MV
Manufacturer Part Number
PIC16LF1827-I/MV
Description
IC, 8BIT MCU, PIC16LF, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-I/MV
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
384Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
4kWords
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Processor Series
PIC16LF
Core
PIC
Data Ram Size
256 B
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F/LF1826/27
23.1
The Capture mode function described in this section is
available and identical for CCP modules ECCP1,
ECCP2, CCP3 and CCP4.
Capture mode makes use of the 16-bit Timer1
resource. When an event occurs on the CCPx pin, the
16-bit CCPRxH:CCPRxL register pair captures and
stores the 16-bit value of the TMR1H:TMR1L register
pair, respectively. An event is defined as one of the
following and is configured by the CCPxM<3:0> bits of
the CCPxCON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the Interrupt Request Flag bit
CCPxIF of the PIRx register is set. The interrupt flag
must be cleared in software. If another capture occurs
before the value in the CCPRxH, CCPRxL register pair
is read, the old captured value is overwritten by the new
captured value.
Figure 23-1 shows a simplified diagram of the Capture
operation.
23.1.1
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
Also, the CCPx pin function can be moved to
alternative pins using the APFCON0 or APFCON1
register. Refer to Section 12.1 “Alternate Pin
Function” for more details.
FIGURE 23-1:
DS41391C-page 206
CCPx
pin
Note:
System Clock (F
Capture Mode
Edge Detect
CCP PIN CONFIGURATION
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
Prescaler
1, 4, 16
and
CCPxM<3:0>
OSC
)
Set Flag bit CCPxIF
(PIRx register)
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
Capture
Enable
CCPRxH
TMR1H
CCPRxL
TMR1L
Preliminary
23.1.2
Timer1 must be running in Timer mode or Synchronized
Counter mode for the CCP module to use the capture
feature. In Asynchronous Counter mode, the capture
operation may not work.
See Section 20.0 “Timer1 Module with Gate Control”
for more information on configuring Timer1.
23.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIEx register clear to
avoid false interrupts. Additionally, the user should
clear the CCPxIF interrupt flag bit of the PIRx register
following any change in Operating mode.
23.1.4
There are four prescaler settings specified by the
CCPxM<3:0> bits of the CCPxCON register. Whenever
the CCP module is turned off, or the CCP module is not
in Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another does not
clear the prescaler and may generate a false interrupt. To
avoid this unexpected operation, turn the module off by
clearing the CCPxCON register before changing the
prescaler. Example 12-1 demonstrates the code to
perform this function.
EXAMPLE 23-1:
BANKSEL CCPxCON
CLRF
MOVLW
MOVWF
Note:
CCPxCON
NEW_CAPT_PS ;Load the W reg with
CCPxCON
TIMER1 MODE RESOURCE
SOFTWARE INTERRUPT MODE
Clocking Timer1 from the system clock
(F
mode. In order for Capture mode to
recognize the trigger event on the CCPx
pin, Timer1 must be clocked from the
instruction clock (F
external clock source.
CCP PRESCALER
OSC
) should not be used in Capture
CHANGING BETWEEN
CAPTURE PRESCALERS
;Set Bank bits to point
;to CCPxCON
;Turn CCP module off
;the new prescaler
;move value and CCP ON
;Load CCPxCON with this
;value
2010 Microchip Technology Inc.
OSC
/4) or from an
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