PIC16LF1827-I/MV Microchip Technology, PIC16LF1827-I/MV Datasheet - Page 231
![IC, 8BIT MCU, PIC16LF, 32MHZ, QFN-28](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC16LF1827-I/MV
Manufacturer Part Number
PIC16LF1827-I/MV
Description
IC, 8BIT MCU, PIC16LF, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-I/MV
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
384Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
4kWords
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Processor Series
PIC16LF
Core
PIC
Data Ram Size
256 B
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 23-4:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6-0
Note 1:
PxRSEN
R/W-0/0
Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator mode or Fail-Safe
mode is enabled.
PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the CCPxASE bit clears automatically once the shutdown event goes away;
0 = Upon auto-shutdown, CCPxASE must be cleared in software to restart the PWM
PxDC<6:0>: PWM Delay Count bits
PxDCx = Number of F
R/W-0/0
the PWM restarts automatically
PWMxCON: ENHANCED PWM CONTROL REGISTER
should transition active and the actual time it transitions active
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
OSC
/4 (4 * T
R/W-0/0
Preliminary
OSC
) cycles between the scheduled time when a PWM signal
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
PxDC<6:0>
R/W-0/0
PIC16F/LF1826/27
R/W-0/0
R/W-0/0
DS41391C-page 231
R/W-0/0
bit 0
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