PIC18LF8680-I/PT Microchip Technology, PIC18LF8680-I/PT Datasheet - Page 449

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PIC18LF8680-I/PT

Manufacturer Part Number
PIC18LF8680-I/PT
Description
IC, 8BIT MCU, PIC18LF, 40MHZ, PLCC-64
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8680-I/PT

Controller Family/series
PIC18
No. Of I/o's
39
Eeprom Memory Size
1024Byte
Ram Memory Size
3328Byte
Cpu Speed
40MHz
No. Of Timers
4
Core Size
8 Bit
Program Memory Size
32768 Words
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Rohs Compliant
Yes
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3328 B
Interface Type
I2C, SPI, AUSART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8680-I/PT
Manufacturer:
Microchip
Quantity:
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Part Number:
PIC18LF8680-I/PT
Manufacturer:
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Quantity:
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FIGURE 27-25:
TABLE 27-26: A/D CONVERSION REQUIREMENTS
 2004 Microchip Technology Inc.
130
131
132
135
136
Note 1:
Param.
No.
Note 1: If the A/D clock source is selected as RC, a time of T
2:
3:
4:
5:
A/D DATA
SAMPLE
A/D CLK
ADRES
2: This is a minimal RC delay (typically 100 ns) which also disconnects the holding capacitor from the analog input.
T
T
T
T
T
Symbol
BSF ADCON0, GO
AD
CNV
ACQ
SWC
AMP
ADIF
ADRES register may be read on the following T
See Section 19.0 “10-bit Analog-to-Digital Converter (A/D) Module” for minimum conditions when input
voltage has changed more than 1 LSb.
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (AV
50 .
On the next Q4 cycle of the device clock.
The time of the A/D clock period is dependent on the device frequency and the T
executed.
GO
Q4
132
A/D Clock Period
Conversion Time
(not including acquisition time) (Note 1)
Acquisition Time (Note 3)
Switching Time from Convert
Amplifier Settling Time (Note 2)
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
9
to AV
PIC18FXX8X
PIC18LFXX8X
PIC18FXX8X
PIC18LFXX8X
8
SS
PIC18F6585/8585/6680/8680
, or AV
OLD_DATA
7
Sample
CY
SS
is added before the A/D clock starts. This allows the SLEEP instruction to be
. . .
SAMPLING STOPPED
to AV
CY
DD
cycle.
. . .
131
130
). The source impedance (R
Min
1.6
3.0
2.0
3.0
11
15
10
1
2
(Note 4)
20
20
Max
6.0
9.0
12
(5)
(5)
1
Units
T
AD
s
s
s
s
s
s
s
0
T
T
A/D RC mode
A/D RC mode
-40 C
0 C
This may be used if the
“new” input voltage has not
changed by more than 1 LSb
(i.e., 5 mV @ 5.12V) from the
last sampled voltage (as
stated on C
OSC
OSC
AD
S
) on the input channels is
clock divider.
based, V
based, V
Temp
NEW_DATA
DONE
Temp
Conditions
DS30491C-page 447
HOLD
T
CY
+125 C
REF
REF
+125 C
).
full range
3.0V

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