PIC32MX360F256L-80I/BG Microchip Technology, PIC32MX360F256L-80I/BG Datasheet
![IC, 32BIT MCU, PIC32, 80MHZ, BGA-100](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX360F256L-80I/BG
Specifications of PIC32MX360F256L-80I/BG
Available stocks
Related parts for PIC32MX360F256L-80I/BG
PIC32MX360F256L-80I/BG Summary of contents
Page 1
... The silicon revision level can be identified using the ® current version of MPLAB IDE and Microchip’s programmers, debuggers and emulation tools, which are available at the Microchip corporate web site (www.microchip.com). TABLE 1: SILICON DEVREV VALUES Part Number PIC32MX360F512L PIC32MX360F256L PIC32MX340F128L PIC32MX320F128L PIC32MX340F512H PIC32MX340F256H PIC32MX340F128H PIC32MX320F128H PIC32MX320F064H PIC32MX320F032H PIC32MX460F512L PIC32MX460F256L ...
Page 2
... PWM values of 0x00 followed by 0x01. In PMP Slave 4B Buffer mode, if the underflow Status bit OBF (PMSTAT<6>) is cleared at the same time a PMP read is attempted, the PMP could receive incorrect data. ( 0x4 0x5 0x5 Affected (1) Revisions © 2010 Microchip Technology Inc. ...
Page 3
... Oscillator Clock Out 28. Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. PIC32MX3XX/4XX Issue Summary When using the hardware assisted read-modify-write registers, PORTxINV, PORTxSET and PORTxCLR, the source used for the operation is the LATx register, not the PORTx register ...
Page 4
... DDPCON register is ‘0’. The RXDA bit does not correctly reflect the RX FIFO status after an overrun event. In Pattern Match mode, the DMA module may not append all of the CRC results to the result buffer. Affected (1) Revisions © 2010 Microchip Technology Inc. ...
Page 5
... BOR 66. Regulator Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. PIC32MX3XX/4XX Issue Summary Clock source switching may cause a general exception or a POR when switching from a slow clock to a fast clock. On 64-pin devices, the TMS pin requires an external pull-up. X Changing the PB divisor on the fly may generate exceptions ...
Page 6
... Work around Do not write values greater than the specified memory size of the device to the Bus Matrix registers. Ensure that the upper bits of the registers remain clear (‘0’). Affected Silicon Revisions © 2010 Microchip Technology Inc. (LDO) ...
Page 7
... Affected Silicon Revisions © 2010 Microchip Technology Inc. PIC32MX3XX/4XX 9. Module: Output Compare The Output Compare module in PWM mode outputs a high of period register (PRx) length when attempting to use PWM values of 0x00 followed by 0x01. Work around Do not use a PWM value of 0x01. Affected Silicon Revisions ...
Page 8
... Work around To detect incorrect WDT Time-out Reset, always confirm that only the WDTO bit is set in the RCON register. If EXTR, SWR, or any other Reset bits are set, it indicates that an incorrect WDT has occurred. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...
Page 9
... © 2010 Microchip Technology Inc. PIC32MX3XX/4XX 19. Module: PMP The WAITE field in PMMODE<1:0> does not add a Wait state to PMP master reads when it is programmed to the value ‘01’. The WAITE field allows Wait states to be added to the end of PMP read/write operations. This field is intended to add ...
Page 10
... Module: PMP Events can be missed if the PMDIN register is used as the DMA source or destination and the PMP IRQ is used as the DMA trigger. Work around Do not use DMA for PMP read or write operations. Affected Silicon Revisions © 2010 Microchip Technology Inc. PORTx PMDIN ...
Page 11
... Affected Silicon Revisions © 2010 Microchip Technology Inc. PIC32MX3XX/4XX 28. Module: Oscillator A clock signal is present on the CLKO pin, regardless of the clock source and setting of the CLOCKOUT Configuration bit, under any of the following conditions. 1. During a Power-on Reset. 2. During device programming. 3. After a JTAG erase. A clock is present on the CLKO pin until the Configuration bit to disable CLOCKOUT is programmed ...
Page 12
... Set/Clear/Invert registers corrupts the data written. Work around Do not write to the affected Set/Clear/Invert regis- ters. Use software read-modify-write sequences to change individual bits or write directly to the PRx and TIMERx registers. Affected Silicon Revisions during the conversion period REF © 2010 Microchip Technology Inc. ...
Page 13
... © 2010 Microchip Technology Inc. PIC32MX3XX/4XX 41. Module: Output Compare The Output Compare module may reinitialize or clear a Fault on an aborted read of the OCxCON register. An aborted read occurs when a read instruction in the CPU pipeline has started execution, but is aborted due to an interrupt. Work around ...
Page 14
... Affected Silicon Revisions 50. Module: Oscillator Changing the PB divisor on the fly may generate exceptions. Work around Ensure 8 NOP instructions precede the write to the PBDIV bits and 8 NOP instructions follow the write to the PBDIV bits. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...
Page 15
... © 2010 Microchip Technology Inc. PIC32MX3XX/4XX 55. Module: DMA The channel event bit may remain set if a transac- tion completes as the user suspends the channel by clearing the corresponding CHEN bit. This has the effect that as soon as the channel is re- enabled the event that should have been cleared ...
Page 16
... If the OERR bit is set and the module is dis- abled, the OERR bit retains its status even after the UART module is reinitialized. Work around The user software must check this bit in the UART module initialization routine and clear set. Affected Silicon Revisions © 2010 Microchip Technology Inc. (RTCALRM, ...
Page 17
... Device may not exit BOR state if BOR event occurs. Work arounds Work around 1: V must remain within the published specification DD (see parameter DC10 of the device data sheet). Work around 2: Reset device by providing POR condition. Affected Silicon Revisions © 2010 Microchip Technology Inc. PIC32MX3XX/4XX ) is set to REF DS80440D-page 17 ...
Page 18
... DC CHARACTERISTICS Param. Symbol Characteristics No. D305 IV Internal Voltage Reference REF DS80440D-page 18 Table 4. Standard Operating Conditions: 2.3V to 3.6V (unless otherwise stated) -40°C ≤ T Operating temperature Min. Typical Max. 0.57 0.6 0.63 ≤ +85°C for Industrial A Units Comments V — © 2010 Microchip Technology Inc. ...
Page 19
... Rev C Document (11/2010) Updated current silicon revision to B6. Added silicon issues 64 (ADC) and 65 (Comparator), and data sheet clarification 1 (Comparator Specifications). Rev D Document (12/2010) Added silicon issue 66 (Voltage Regulator). © 2010 Microchip Technology Inc. PIC32MX3XX/4XX (Device (Bus Compare), 10 errata 37 (USB), (Output Compare), 45 ...
Page 20
... PIC32MX3XX/4XX NOTES: DS80440D-page 20 © 2010 Microchip Technology Inc. ...
Page 21
... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
Page 22
... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-213-7830 Fax: 886-7-330-9305 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2010 Microchip Technology Inc. 08/04/10 ...