PIC32MX360F256L-80I/BG Microchip Technology, PIC32MX360F256L-80I/BG Datasheet - Page 6
![IC, 32BIT MCU, PIC32, 80MHZ, BGA-100](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX360F256L-80I/BG
Manufacturer Part Number
PIC32MX360F256L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.MA320002.pdf
(208 pages)
2.DM320001.pdf
(44 pages)
3.PIC32MX320F032H-40IPT.pdf
(48 pages)
4.PIC32MX320F032H-40IPT.pdf
(66 pages)
5.PIC32MX320F032H-40IPT.pdf
(22 pages)
6.PIC32MX320F064H-40IMR.pdf
(172 pages)
Specifications of PIC32MX360F256L-80I/BG
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
256 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EUART, I2C, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX360F256L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX3XX/4XX
Silicon Errata Issues
1. Module: Device Reset
2. Module: Device Reset
3. Module: Device Reset
DS80440D-page 6
Note:
A Reset (MCLR) Pulse that is shorter than
2 SYSCLK will not reset the device properly.
Work around
Ensure that the device is held in Reset for more
than 2 SYSCLK to ensure proper device Reset
operation.
Affected Silicon Revisions
All Resets, except Power-on Reset, can cause a
Fail-Safe Clock Monitor event (if enabled) when
the duration of the Reset pulse exceeds the clock
period of the internal fail-safe clock reference clock
(31 kHz).
Work around
If long Reset pulses are anticipated, ignore or
disable Fail-Safe Clock Monitor events.
Affected Silicon Revisions
Attempting to perform a software device Reset
with PBDIV set to 1:1, and SYSCLK less than
1 MHz will not reset the device properly.
Work arounds
Work around 1:
Change PBDIV before performing a software
Reset.
Work around 2:
Set SYSCLK to a value that is greater than 1 MHz.
Affected Silicon Revisions
B2
B2
B2
X
X
X
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (B6).
B3
B3
B3
X
X
X
B4
B4
B4
X
X
X
B6
B6
B6
X
X
X
4. Module: External Voltage Regulator
5. Module: ADC
6. Module: Bus Matrix
A V
CPU to reset when using an external core voltage
supply.
Work arounds
Work around 1:
Use the internal voltage regulator.
Work around 2:
Use an external 1.8V regulator, which has a
regulation specification of ≤ 2.5%. The Microchip
TC1055-1.8VCT713
regulator, or an equivalent, is recommended.
Affected Silicon Revisions
When running the Analog-to-Digital Converter
(ADC) module in Internal Reference mode, the
gain error is 3-4 LSb and the offset error is 1-2 LSb
across voltage and speed.
Work around
Use in-system calibration and software techniques
to compensate for these errors.
Affected Silicon Revisions
The BMXDUDBA, BMXDUPBA and BMXPUPBA
registers can be set to values that are outside the
device’s actual memory size limit.
Work around
Do not write values greater than the specified
memory size of the device to the Bus Matrix
registers. Ensure that the upper bits of the
registers remain clear (‘0’).
Affected Silicon Revisions
B2
B2
B2
X
X
X
DDCORE
B3
B3
B3
X
X
X
voltage less than 1.75V will cause the
B4
B4
B4
X
X
X
© 2010 Microchip Technology Inc.
B6
B6
B6
X
X
X
Low
Drop-Out
(LDO)