PIC32MX360F256L-80I/BG Microchip Technology, PIC32MX360F256L-80I/BG Datasheet - Page 13
![IC, 32BIT MCU, PIC32, 80MHZ, BGA-100](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX360F256L-80I/BG
Manufacturer Part Number
PIC32MX360F256L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.MA320002.pdf
(208 pages)
2.DM320001.pdf
(44 pages)
3.PIC32MX320F032H-40IPT.pdf
(48 pages)
4.PIC32MX320F032H-40IPT.pdf
(66 pages)
5.PIC32MX320F032H-40IPT.pdf
(22 pages)
6.PIC32MX320F064H-40IMR.pdf
(172 pages)
Specifications of PIC32MX360F256L-80I/BG
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
256 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EUART, I2C, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX360F256L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
37. Module: USB
38. Module: UART
39. Module: Output Compare
40. Module: SPI
© 2010 Microchip Technology Inc.
The USB clock does not automatically suspend
when entering Sleep mode.
Work around
Turn off the USB clock before entering Sleep
mode.
Affected Silicon Revisions
The TRMT bit is asserted during the STOP bit
generation not after the STOP bit has been sent.
Work around
If firmware needs to be aware when the transmis-
sion is complete, firmware should add a half bit
time delay after the TRMT bit is asserted.
Affected Silicon Revisions
The fault override of the PWM output pin(s) does
not occur asynchronously; it is synchronized to the
PB clock. The synchronization takes up to 2 PB
clock periods for the fault event to tri-state the
PWM output pin.
Work around
None.
Affected Silicon Revisions
The SPIBUSY and SRMT bits assert 1 bit time
before the end of the transaction.
Work around
Firmware must provide a 1 bit time delay between
the assertion of these bits and performing any
operation that requires the transaction to be
complete.
Affected Silicon Revisions
B2
B2
B2
B2
X
X
X
X
B3
B3
B3
B3
X
X
X
X
B4
B4
B4
B4
X
X
X
X
B6
B6
B6
B6
X
X
X
X
41. Module: Output Compare
42. Module: USB
43. Module: USB
The Output Compare module may reinitialize or
clear a Fault on an aborted read of the OCxCON
register. An aborted read occurs when a read
instruction in the CPU pipeline has started
execution, but is aborted due to an interrupt.
Work around
Disable interrupts before reading the contents of
the OCxCON register, and then re-enable
interrupts after reading the register.
Affected Silicon Revisions
The TOKBUSY bit does not correctly indicate
status when a transfer completes within the Start
of Frame threshold.
Work around
Use a firmware semaphore to track when a token
is written to U1TOK. Firmware then clears the
semaphore when the transfer is complete.
Affected Silicon Revisions
The interval between the first two SOF packets
generated does not meet the USB specification.
The first count could be short due to an
uninitialized counter.
Work around
There is no work around for the non-compliant tim-
ing. It is recommended that firmware not send data
in the first frame.
Affected Silicon Revisions
B2
B2
B2
X
X
X
PIC32MX3XX/4XX
B3
B3
B3
X
X
X
B4
B4
B4
X
X
X
B6
B6
B6
X
X
X
DS80440D-page 13