AT80C51RD2-3CSUM Atmel, AT80C51RD2-3CSUM Datasheet - Page 25

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AT80C51RD2-3CSUM

Manufacturer Part Number
AT80C51RD2-3CSUM
Description
IC, 8BIT MCU, 80C51, 40MHZ, DIP-40
Manufacturer
Atmel
Datasheet

Specifications of AT80C51RD2-3CSUM

Controller Family/series
80C51
No. Of I/o's
32
Ram Memory Size
1280Byte
Cpu Speed
40MHz
No. Of Timers
3
No. Of Pwm Channels
5
Digital Ic Case Style
DIP
Core Size
8 Bit
Rohs Compliant
Yes
Processor Series
AT80x
Core
8051
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIL-40
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Cpu Family
AT80
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Program Memory Size
Not Required
Total Internal Ram Size
1.25KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4113D–8051–01/09
Table 10-2.
CCON - PCA Counter Control Register (D8h)
Reset Value = 000X 0000b
Not bit addressable
The watchdog timer function is implemented in module 4 (see Figure 10-4).
The PCA interrupt system is shown in Figure 10-2.
• Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and
Number
are set by hardware when either a match or a capture occurs. These flags can only be
cleared by software.
CF
Bit
7
7
6
5
4
3
2
1
0
Mnemonic
CCON Register
CCF4
CCF3
CCF2
CCF1
CCF0
CR
CR
Bit
CF
6
-
Description
PCA Counter Overflow flag
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in CMOD is
set. CF may be set by either hardware or software but can only be cleared by software.
PCA Counter Run control bit
Must be cleared by software to turn the PCA counter off.
Set by software to turn the PCA counter on.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Module 4 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 3 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 2 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 1 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 0 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
5
-
CCF4
4
CCF3
3
CCF2
2
AT80C51RD2
CCF1
1
CCF0
0
25

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