AT80C51RD2-3CSUM Atmel, AT80C51RD2-3CSUM Datasheet - Page 49

• Manufacturer Part Number: AT80C51RD2-3CSUM
• Description: IC, 8BIT MCU, 80C51, 40MHZ, DIP-40
• Manufacturer: Atmel

Specifications of AT80C51RD2-3CSUM

• Controller Family/series: 80C51
• No. Of I/o's: 32
• Ram Memory Size: 1280Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 5
• Digital Ic Case Style: DIP
• Core Size: 8 Bit
• Rohs Compliant: Yes
• Processor Series: AT80x
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 1280 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIL-40
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Cpu Family: AT80
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 1.25KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4113D–8051–01/09
Reset Value = XXXX XXX0b
Bit addressable
Table 12-6.
IPL1 - Interrupt Priority Register (B2h)
Reset Value = XXXX XXX0b
Bit addressable
Table 12-7.
Number
Number
Bit
Bit
7
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
-
IPL1 Register
IPH1 Register
Mnemonic Description
Mnemonic Description
KBDL
KBD
Bit
Bit
6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Keyboard interrupt Enable bit
Cleared to disable keyboard interrupt.
Set to enable keyboard interrupt.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Keyboard Interrupt Priority bit
Refer to KBDH for priority level.
5
-
4
-
3
-
2
-
AT80C51RD2
1
-
KBDL
0
49