AT80C51RD2-3CSUM Atmel, AT80C51RD2-3CSUM Datasheet - Page 38

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AT80C51RD2-3CSUM

Manufacturer Part Number
AT80C51RD2-3CSUM
Description
IC, 8BIT MCU, 80C51, 40MHZ, DIP-40
Manufacturer
Atmel
Datasheet

Specifications of AT80C51RD2-3CSUM

Controller Family/series
80C51
No. Of I/o's
32
Ram Memory Size
1280Byte
Cpu Speed
40MHz
No. Of Timers
3
No. Of Pwm Channels
5
Digital Ic Case Style
DIP
Core Size
8 Bit
Rohs Compliant
Yes
Processor Series
AT80x
Core
8051
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIL-40
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Cpu Family
AT80
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Program Memory Size
Not Required
Total Internal Ram Size
1.25KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.3.1
Figure 11-5. Internal Baud Rate
38
AT80C51RD2
Internal Baud Rate Generator (BRG)
Peripheral clock
BRR
Table 11-3.
When the internal Baud Rate Generator is used, the Baud Rates are determined by the BRG
overflow depending on the BRL reload value, the value of SPD bit (Speed Mode) in BDRCON
register and the value of the SMOD1 bit in PCON register.
• The baud rate for UART is token by formula:
(T2CON)
BaudRate
(
TCLK
BRL
X
X
X
0
1
0
1
0
1
)
=
Baud Rate Selection Table UART
/6
256
=
--------------------------------------------------------------------------------------------------------- -
2
(T2CON)
×
---------------------------------------------------------------------------------------- -
2
RCLK
2
×
X
X
X
0
0
1
1
0
1
SPD
×
0
1
2
6
2
×
auto reload counter
SMOD1
2
6
1 SPD
SMOD
(
1 SPD
×
(BDRCON)
×
F
)
F
BRG
BRL
TBCK
×
×
CLKPERIPH
CLKPERIPH
0
0
0
0
1
1
0
0
1
16
16
×
×
overflow
[
BaudRate
256
(BDRCON)
(
BRL
RBCK
0
0
0
0
0
0
1
1
1
)
]
/2
Clock Source
0
1
INT_BRG
INT_BRG
INT_BRG
UART Tx
Timer 1
Timer 2
Timer 1
Timer 2
Timer 1
Timer 2
INT_BRG
4113D–8051–01/09
Clock Source
UART Rx
INT_BRG
INT_BRG
INT_BRG
Timer 1
Timer 1
Timer 2
Timer 2
Timer 1
Timer 2

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