MB95F264KPF-G-SNE2 Fujitsu, MB95F264KPF-G-SNE2 Datasheet - Page 62

• Manufacturer Part Number: MB95F264KPF-G-SNE2
• Description: MCU, 8BIT, 20K FLASH, 8FX, 20SOP
• Manufacturer: Fujitsu

Specifications of MB95F264KPF-G-SNE2

• No. Of I/o's: 17
• Ram Memory Size: 496Byte
• Cpu Speed: 16.25MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 2
• Core Size: 8bit
• Program Memory Size: 20KB
• Oscillator Type: Internal, External
• Controller Family/series: MB95260H

MB95260H/270H/280H Series
Sampling is executed at the falling edge of the sampling clock*
(ESCR register: SCES bit = 1, ECCR register: SCDE bit = 0)
*1: There is a function used to choose whether the sampling of reception data is performed at a rising edge or
*2: The serial clock delay function is a function used to delay the output signal of the serial clock for half the clock.
*3: See “(2) Source Clock / Machine Clock” for t
62
Serial clock cycle time
SCK ↑→ SOT delay time
Valid SIN → SCK ↓
SCK ↓→ valid SIN hold time
Serial clock “H” pulse width
Serial clock “L” pulse width
SCK ↑→ SOT delay time
Valid SIN → SCK ↓
SCK ↓→ valid SIN hold time
SCK fall time
SCK rise time
a falling edge of the serial clock.
Parameter
Symbol Pin name
t
t
t
t
t
t
t
t
t
SHOVE
SHOVI
SCYC
IVSLE
SLIXE
SHSL
SLSH
IVSLI
SLIXI
t
t
F
R
SCK
SCK, SOT
SCK, SIN
SCK, SIN
SCK
SCK
SCK, SOT
SCK, SIN
SCK, SIN
SCK
SCK
MCLK
.
operation output pin:
operation output pin:
C
C
(V
L
L
External clock
Internal clock
= 80 pF + 1 TTL
= 80 pF + 1 TTL
CC
Condition
= 5.0 V±10%, V
1
, and serial clock delay is disabled*
t
3 t
SS
MCLK
t
t
MCLK
MCLK
5 t
MCLK
= 0.0 V, T
Min
− 95
190
*
MCLK
*
—
*
—
—
3
0
3
3
*
+ 190
3
+ 95
+ 95
*
− t
3
Value
R
A
=
2 t
-
DS07–12627–6E
MCLK
40°C to + 85°C)
Max
+ 95
10
10
—
—
—
—
—
—
—
*
3
+ 95 ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
.