LTC3675EUFF#PBF Linear Technology, LTC3675EUFF#PBF Datasheet - Page 23

• Manufacturer Part Number: LTC3675EUFF#PBF
• Description: IC, PMIC, 1A, QFN-44
• Manufacturer: Linear Technology

Specifications of LTC3675EUFF#PBF

• Supply Voltage: 5.5V
• No. Of Step-down Dc - Dc Converters: 4
• No. Of Ldo Regulators: 1
• Digital Ic Case Style: QFN
• No. Of Pins: 44
• No. Of Regulated Outputs: 7
• Operating Temperature Range: -40°C To +125°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OPERATION
Table 1. Summary of I
SUB-ADDRESS
A7A6A5A4A3A2A1A0
0000 0000 (00h)
0000 0001 (01h)
0000 0010 (02h)
0000 0011 (03h)
0000 0100 (04h)
0000 0101 (05h)
0000 0110 (06h)
0000 0111 (07h)
0000 1000 (08h)
0000 1001 (09h)
0000 1010 (0Ah)
0000 1011 (0Bh)
0000 1100 (0Ch)
0000 1101 (0Dh)
0000 1111 (0Fh)
received. Once all chips on the bus have been addressed
and sent valid data, a global STOP can be sent and the
LTC3675 will update its command latches with the data
that it had received.
It is important to understand that until a STOP signal is
transmitted, data written to the LTC3675 command reg-
isters is not acted on by the LTC3675. Only once a STOP
signal is issued is the data transferred to the command latch
and acted on. The one exception is when sub-address 0Fh
is written to clear an interrupt. To clear an interrupt, sub
address OFh must be written, followed by sub address 00h.
A complete clear interrupt cycle would have the following
write sequence: 12h, 0Fh, STOP , 12h, 00h, STOP .
OPER-
ATION ACTION
Read/
Read/
Read/
Read/
Read/
Read/
Read/
Read/
Read/
Read/
Read/
Write No Register
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write Clear Interrupt
Read
Read
2
C Sub-Addresses and Byte Formats. Bits A7, A6, A5, A4 of Sub-Address Need to Be 0 to Access Registers
Selected
Buck1 Register
Buck2 Register
Buck3 Register
Buck4 Register
Boost Register
Buck-Boost
Register
LED
Confi guration
Register
LED DAC
Register
UVOT Register
RSTB Mask
Register
IRQB Mask
Register
Status Register
(Real Time)
Status Register
(Latched)
BYTE FORMAT
D7D6D5D4D3D2D1D0
Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Enable, OUT_Hi-Z, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Enable, Unused, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Enable, Unused, Mode, Slow, DAC[3],
DAC[2], DAC[1], DAC[0]
Unused, Mode[1], Mode[0], Slow, 2XFS,
GRAD[2], GRAD[1], GRAD[0]
DAC[7], DAC[6], DAC[5], DAC[4], DAC[3],
DAC[2], DAC[1], DAC[0]
RESET_ALL, UV[2], UV[1], UV[0], UNUSED,
UNUSED, OT[1], OT[0]
UNUSED, PGOOD[7], PGOOD[6], PGOOD[5],
PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1]
UNUSED, PGOOD[7], PGOOD[6], PGOOD[5],
PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1]
UNUSED, UNUSED, PGOOD[6], PGOOD[5],
PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1]
UV, OT, PGOOD[6], PGOOD[5], PGOOD[4],
PGOOD[3], PGOOD[2], PGOOD[1]
I
The LTC3675 has eleven command registers and two
status registers. The contents of any of these registers
may be read back via I
To read the data of a register, that register’s sub-address
must be provided to the LTC3675. The bus master reads
the status of the LTC3675 with a START condition followed
by the LTC3675 write address followed by the fi rst data
byte (the sub-address of the register whose data needs
to be read) which is acknowledged by the LTC3675. After
receiving the acknowledge signal from the LTC3675 the
bus master initiates a new START condition followed by
the LTC3675 read address. The LTC3675 acknowledges
the read address and then returns a byte of read back
2
C Bus Read Operation
DEFAULT
D7D6D5D4D3D2D1D0 COMMENTS
01101111
01101111
01101111
01101111
00001111
00001111
00001111
00000000
00000000
11111111
00000000
2
C.
Used in the Clear Interrupt
Operation.
00000000 = LED Driver Disabled
11111111 = 25mA per String
Fault will pull RSTB low if the
corresponding bit is ‘1’
Fault will pull IRQB low if the
corresponding bit is ‘1’
Read Back
Read Back
Clears the Interrupt Bit,
Status Latches are Unlatched
LTC3675
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