MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 110

• Manufacturer Part Number: MCIMX535DVV1C
• Description: IMX53 REV 2.1 COMM
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX535DVV1C

• Rohs Compliant: YES
• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 1GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Supply Voltage Range: 1.25V To 1.35V
• Operating Temperature Range: -20°C To +85°C
• Msl: MSL 3 - 168 Hours
• Embedded Interface Type: I2C, SPI, UART
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Electrical Characteristics
4.7.9
The LVDS interface complies with TIA/EIA 644-A standard. For more details, see TIA/EIA STANDARD
644-A, “Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits”.
4.7.10
Figure 60
Figure 61
110
15
DISP_CS_DOWN is predefined in REGISTER.
1
OW1
OW2
OW3
OW4
Display RS down time
In order not to mask signaling by other devices on the 1-Wire bus, t
One-Wire bus
(BATT_LINE)
ID
depicts the RPP timing, and
depicts Write 0 Sequence timing, and
LVDS Display Bridge (LDB) Module Parameters
One-Wire (OWIRE) Timing Parameters
Reset Time Low
Presence Detect High
Presence Detect Low
Reset Time High
(includes recovery time)
One-Wire bus
(BATT_LINE)
Table 63. RPP Sequence Delay Comparisons Timing Parameters
Figure 60. Reset and Presence Pulses (RPP) Timing Diagram
i.MX53xD Applications Processors for Consumer Products, Rev. 1
Parameters
One-WIRE Tx
“Reset Pulse”
Figure 61. Write 0 Sequence Timing Diagram
OW1
Tdicdcs
Table 63
=
(
T DI_CLK
t
R
lists the RPP timing parameters.
Table 64
Symbol
OW5
t
t
t
t
RSTH
×
RSTL
PDH
PDL
ceil
)
lists the timing parameters.
DISP_CS_DOWN_#
-------------------------------------------------- -
RSTL
DI_CLK_PERIOD
OW6
OW3
+ t
OW2
One Wire Device Tx
Min
480
480
15
60
R
“Presence Pulse”
should always be less than 960 µs.
Typ
511
512
OW4
—
—
t
REC
Freescale Semiconductor
Max
240
—
60
—
1
Unit
µs
µs
µs
µs