CS8405A-CS Cirrus Logic Inc, CS8405A-CS Datasheet - Page 6

• Manufacturer Part Number: CS8405A-CS
• Description: Transceiver IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS8405A-CS

• Peak Reflow Compatible (260 C): No
• Supply Voltage: 5V
• Supply Voltage Max: 5V
• Transceiver Type: Digital Audio
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Interface Type: Serial
• Package / Case: 28-SOIC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS
(T
Logic 0 = 0 V, Logic 1 = VL+; C
Notes: 5. The active edge of ISCLK is programmable.
6
SDIN Setup Time Before ISCLK Active Edge
SDIN Hold Time After ISCLK Active Edge
Master Mode
OMCK to ISCLK active edge delay
OMCK to ILRCK delay
ISCLK and ILRCK Duty Cycle
Slave Mode
ISCLK Period
ISCLK Input Low Width
ISCLK Input High Width
ISCLK Active Edge to ILRCK Edge
ILRCK Edge Setup Before ISCLK Active Edge
A
= 25 °C for suffixes ‘CS’ &’CZ’, T
Figure 1. Audio Port Master Mode Timing
6. The polarity of ILRCK is programmable.
7. No more than 128 SCLK per frame.
8. This delay is to prevent the previous ISCLK edge from being interpreted as the first one after ILRCK has
9. This setup time ensures that this ISCLK edge is interpreted as the first one after ILRCK has changed.
(output)
ISCLK
ILRCK
(output)
OMCK
(input)
changed.
t smd
Parameter
L
= 20 pF)
t
lmd
A
= -40 to 85°C for ‘IS’ & ‘IZ’ ; VD+ = 5V±10%, VL+ = 3/5V ±5/10%, Inputs:
(Note 5,6,8)
(Note 5,6,9)
(Note 5)
(Note 5)
(Note 5)
(Note 6)
(Note 7)
Figure 2. Audio Port Slave Mode and Data Input Timing
(input)
ISCLK
ILRCK
(input)
SDIN
Symbol
t
t
t
t
t
t
t
sckw
sckh
lrckd
lrcks
t
t
smd
sckl
lmd
ds
dh
t
lrckd
Min
20
20
36
14
14
20
20
0
0
-
t
lrcks
t
ds
Typ
50
-
-
-
-
-
-
-
-
-
t
sckh
t
dh
t
sckw
Max
10
10
t
-
-
-
-
-
-
-
-
sckl
CS8405A
DS469PP4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
%