PIC16LC774-I/PQ Microchip Technology, PIC16LC774-I/PQ Datasheet - Page 69

• Manufacturer Part Number: PIC16LC774-I/PQ
• Description: 44 PIN, 7KB OTP, 256 RAM, 33 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC774-I/PQ

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-MQFP, 44-PQFP
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, SSP, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.2.2
The addressing procedure for the I
the first byte after the START condition usually deter-
mines which device will be the slave addressed by the
master. The exception is the general call address which
can address all devices. When this address is used, all
devices should, in theory, respond with an acknowl-
edge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all 0’s with R/W = 0
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is enabled (SSPCON2<7>
is set). Following a start-bit detect, 8-bits are shifted
into SSPSR and the address is compared against
SSPADD, and is also compared to the general call
address, fixed in hardware.
FIGURE 8-16: SLAVE MODE GENERAL CALL ADDRESS SEQUENCE (7 OR 10-BIT MODE)
1999 Microchip Technology Inc.
GCEN
(SSPCON2<7>)
SSPOV
(SSPCON<6>)
SDA
SCL
SSPIF
BF
(SSPSTAT<0>)
GENERAL CALL ADDRESS SUPPORT
S
1
2
General Call Address
2
C bus is such that
3
2
C protocol. It
4
Advance Information
5
6
7
R/W = 0
8
If the general call address matches, the SSPSR is
transfered to the SSPBUF, the BF flag is set (eighth bit),
and on the falling edge of the ninth bit (ACK bit) the
SSPIF flag is set.
When the interrupt is serviced. The source for the
interrupt can be checked by reading the contents of the
SSPBUF to determine if the address was device spe-
cific or a general call address.
In 10-bit mode, the SSPADD is required to be updated
for the second half of the address to match, and the UA
bit is set (SSPSTAT<1>). If the general call address is
sampled when GCEN is set while the slave is config-
ured in 10-bit address mode, then the second half of
the address is not necessary, the UA bit will not be set,
and the slave will begin receiving data after the
acknowledge
ACK
Address is compared to General Call Address
after ACK, set interrupt flag
9
D7
1
D6
2
Cleared in software
SSPBUF is read
(Figure
Receiving data
D5
3
D4
4
8-16).
D3
5
PIC16C77X
D2
6
D1
7
DS30275A-page 69
D0
8
ACK
9
’0’
’1’