PIC17C42A-16/L Microchip Technology, PIC17C42A-16/L Datasheet - Page 160

• Manufacturer Part Number: PIC17C42A-16/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C42A-16/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: OTP
• Ram Size: 232 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Processor Series: PIC17C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 232 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164317 - MODULE SKT MPLAB PM3 44PLCCDVA17XL441 - DEVICE ADAPTER FOR PIC17C42A309-1007 - ADAPTER 44-PLCC ZIF TO 40-DIPAC174002 - MODULE SKT PROMATEII 44PLCC
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC17C42A-16/LR; PIC17C42A-16/LR

PIC17C4X
FIGURE 17-9: USART MODULE: SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 17-9:
FIGURE 17-10: USART MODULE: SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TABLE 17-10: SERIAL PORT SYNCHRONOUS RECEIVE REQUIREMENTS
DS30412C-page 160
Applicable Devices 42 R42 42A 43 R43 44
RA4/RX/DT
RA5/TX/CK
†
†
Parameter
Parameter
RA4/RX/DT
RA5/TX/CK
120
121
122
125
126
No.
No.
Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and are not
tested.
pin
pin
pin
pin
Sym
TckH2dtV
TckRF
TdtRF
Sym
TdtV2ckL
TckL2dtl
SERIAL PORT SYNCHRONOUS TRANSMISSION REQUIREMENTS
Characteristic
SYNC XMIT (MASTER & SLAVE)
Clock high to data out valid
Clock out rise time and fall time (Master
Mode)
Data out rise time and fall time
Characteristic
SYNC RCV (MASTER & SLAVE)
Data hold before CK (DT hold time)
Data hold after CK (DT hold time)
120
121
125
121
126
Min
Min
15
15
—
—
—
Typ†
Typ†
10
10
—
—
—
122
1996 Microchip Technology Inc.
Max
Max
65
35
35
—
—
Units Conditions
Units Conditions
ns
ns
ns
ns
ns