PIC18C601-I/L Microchip Technology, PIC18C601-I/L Datasheet - Page 153

• Manufacturer Part Number: PIC18C601-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C601-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT68L1 - SOCKET TRANSITION ICE 68PLCCAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C601I/L

15.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received, simultaneously. All four
modes of SPI are supported. To accomplish communi-
cation, typically three pins are used:
• Serial Data Out (SDO) - RC5/SDO
• Serial Data In (SDI) - RC4/SDI/SDA
• Serial Clock (SCK) - RC3/SCK/SCL/LVOIN
Additionally, a fourth pin may be used when in any
Slave mode of operation:
• Slave Select (SS) - RA5/SS/AN4
15.3.1
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits SSPCON1<5:0> and SSPSTAT<7:6>.
These control bits allow the following to be specified:
• Master mode (SCK is the clock output)
• Slave mode (SCK is the clock input)
• Clock polarity (Idle state of SCK)
• Data input sample phase (middle or end of data
• Clock edge (output data on rising/falling edge of
• Clock rate (Master mode only)
• Slave Select mode (Slave mode only)
Figure 15-1 shows the block diagram of the MSSP
module, when in SPI mode.
output time)
SCK)
2001 Microchip Technology Inc.
SPI Mode
OPERATION
Advance Information
FIGURE 15-1:
SDO
SCK
SDI
SS
Note:
I/O pins have diode protection to V
Read
SS Control
PIC18C601/801
Select
SMP:CKE
Edge
Enable
bit0
Select
Edge
SSPBUF reg
TRIS bit
Data to TX/RX in SSPSR
MSSP BLOCK DIAGRAM
(SPI MODE)
2
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
DS39541A-page 153
Prescaler
Write
4, 16, 64
Clock
(
Shift
TMR2 Output
DD
Data Bus
Internal
and V
2
T
OSC
SS
.
)