PIC18C601-I/L Microchip Technology, PIC18C601-I/L Datasheet - Page 251

• Manufacturer Part Number: PIC18C601-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C601-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT68L1 - SOCKET TRANSITION ICE 68PLCCAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C601I/L

SUBFWB (Cont.)
Example 1:
Example 2:
Example 3:
2001 Microchip Technology Inc.
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
REG
WREG
C
REG
WREG
C
Z
N
REG
WREG
C
REG
WREG
C
Z
N
REG
WREG
C
REG
WREG
C
Z
N
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
SUBFWB
SUBFWB
SUBFWB
3
2
1
0FFh
2
0
0
1
2
5
1
2
3
1
0
0
1
2
0
0
2
1
1
0
; result is negative
; result is positive
; result is zero
REG
REG
REG
Advance Information
SUBLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1:
Example 2:
Example 3:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
WREG
C
WREG
C
Z
N
WREG
C
WREG
C
Z
N
WREG
C
WREG
C
Z
N
Q1
PIC18C601/801
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
literal ’k’
Subtract WREG from literal
[ label ] SUBLW k
0
k – (WREG)
N,OV, C, DC, Z
WREG is subtracted from the eight
bit literal 'k'. The result is placed in
WREG.
1
1
SUBLW
SUBLW
SUBLW
Read
Q2
0000
1
?
1
1
0
0
2
?
0
1
1
0
3
?
0FFh ; (2’s complement)
0
0
1
k
; result is positive
; result is zero
; result is negative
255
02h
02h
02h
1000
Process
Data
Q3
DS39541A-page 251
WREG
kkkk
Write to
WREG
Q4
kkkk