PIC18F6722-E/PT Microchip Technology, PIC18F6722-E/PT Datasheet - Page 11

• Manufacturer Part Number: PIC18F6722-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6722-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11
• Lead Free Status / Rohs Status: Details

32. Module: MSSP (I
33. Module: MSSP (I
© 2006 Microchip Technology Inc.
It has been observed that, following a Power-on
Reset, I
configuring the SCLx and SDAx pins as either
inputs or outputs. This has only been seen in a few
unique system environments.
A test of a statistically significant sample of pre-
production systems, across the voltage and
current range of the application's power supply,
should indicate if a system is susceptible to this
issue.
Work around
Before configuring the module for I
1. Configure the SCLx and SDAx pins as outputs
2. Force SCLx and SDAx low by clearing the
3. While keeping the LAT bits clear, configure
Once this is done, use the SSPxCON1 and
SSPxCON2 registers to configure the proper I
mode as before.
Date Codes that pertain to this issue:
All engineering and production devices.
In I
ware to begin data reception, and cleared by the
peripheral after a byte is received. After a byte is
received, the device may take up to 80 T
RCEN and 800 T
Work around
Single byte receptions are typically not affected,
since the delay between byte receptions typically
is long enough for the RCEN bit to clear. For mul-
tiple byte receptions, the software must wait until
the bit is cleared by the peripheral before the next
byte can be received.
Date Codes that pertain to this issue:
All engineering and production devices.
2
by clearing their corresponding TRIS bits.
corresponding LAT bits.
SCLx and SDAx as inputs by setting their TRIS
bits.
C Master mode, the RCEN bit is set by soft-
2
C mode may not initialize properly by just
CY
during emulation.
2
2
C Mode)
C Mode)
2
C operation:
CY
PIC18F6627/6722/8627/8722
to clear
2
C
34. Module: ECCP (PWM Mode)
35. Module: ECCP (PWM Mode)
36. Module: CCP (PWM Mode)
When the PWM auto-shutdown feature is
configured for automatic restart by setting the
PxRSEN bit (ECCPxDEL<7>), the pulse may
terminate immediately in a shutdown event. In
addition, the pulse may restart within the period if
the shutdown condition expires. This may result in
the generation of short pulses on the PWM
output(s).
Work around
Configure the auto-shutdown for software restart
by clearing the PxRSEN bit. The PWM can be re-
enabled
(ECCPxAS<7>) after the shutdown condition
expires.
Date Codes that pertain to this issue:
All engineering and production devices.
When configured for half-bridge operation with
dead band (CCPxCON<7:6> = 10), the PWM out-
put may be corrupted for certain values of the
PWM duty cycle. This can occur when these
additional criteria are also met:
• a non-zero, dead-band delay is specified
• the duty cycle has a value of 0 through 3, or
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
Timer4 is not available as a clock source for either
CCP4
(CCPxCON<3:2> = 11). Selecting Timer4 as the
module’s clock source may cause the PWM output
to stop generating pulses.
Work around
To use CCP4 or CCP5 in PWM mode, use only
Timer2 as the clock source (T3CON<6,3> = 00).
Date Codes that pertain to this issue:
All engineering and production devices.
(PxDC6:PxDC0 > 0); and
4n + 3 (n ≥ 1).
or
by
CCP5
clearing
in
the
any
DS80221C-page 11
ECCPxASE
PWM
mode
bit