PIC18LF1330-I/ML Microchip Technology, PIC18LF1330-I/ML Datasheet - Page 145
![Microcontroller](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF1330-I/ML
Manufacturer Part Number
PIC18LF1330-I/ML
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
Specifications of PIC18LF1330-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- Current page: 145 of 318
- Download datasheet (3Mb)
TABLE 14-6:
2009 Microchip Technology Inc.
INTCON
IPR3
PIE3
PIR3
PTCON0
PTCON1
PTMRL
PTMRH
PTPERL
PTPERH
SEVTCMPL
SEVTCMPH
PWMCON0
PWMCON1
DTCON
FLTCONFIG
OVDCOND
OVDCONS
PDC0L
PDC0H
PDC1L
PDC1H
PDC2L
PDC2H
Legend:
Note 1:
Name
2:
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
— = unimplemented, read as ‘0’. Shaded cells are not used with the Power Control PWM.
Double-buffered register pairs. Refer to text for explanation of how these registers are read and written to.
Reset condition of PWMEN bits depends on the PWMPIN Configuration bit.
(1)
(1)
PWM Time Base Register (lower 8 bits)
PWM Time Base Period Register (lower 8 bits)
PWM Special Event Compare Register (lower 8 bits)
PWM Duty Cycle #0L Register (lower 8 bits)
PWM Duty Cycle #1L Register (lower 8 bits)
PWM Duty Cycle #2L Register (lower 8 bits)
SEVOPS3 SEVOPS2
GIE/GIEH PEIE/GIEL
PTOPS3
BRFEN
DTPS1
PTEN
REGISTERS ASSOCIATED WITH THE POWER CONTROL PWM MODULE
Bit 7
—
—
—
—
—
—
—
—
—
—
—
—
PWMEN2
PTOPS2
DTPS0
PTDIR
Bit 6
—
—
—
—
—
—
—
—
—
—
—
—
(2)
PWM Duty Cycle #0H Register (upper 6 bits)
PWM Duty Cycle #1H Register (upper 6 bits)
PWM Duty Cycle #2H Register (upper 6 bits)
PWMEN1
SEVOPS1
PTOPS1
TMR0IE
POVD5
POUT5
Bit 5
DT5
—
—
—
—
—
—
—
—
(2)
PWMEN0
SEVOPS0
PTOPS0
POVD4
POUT4
INT0IE
PTIP
PTIE
Bit 4
PTIF
DT4
—
—
—
—
—
(2)
PWM Time Base Register (upper 4 bits)
PWM Time Base Period Register
(upper 4 bits)
PWM Special Event Compare Register
(upper 4 bits)
PTCKPS1 PTCKPS
SEVTDIR
POVD3
POUT3
RBIE
Bit 3
DT3
—
—
—
—
—
—
PIC18F1230/1330
TMR0IF
PMOD2
POVD2
POUT2
FLTAS
Bit 2
DT2
—
—
—
—
—
0
FLTAMOD FLTAEN
PTMOD1 PTMOD0
PMOD1
POVD1
POUT1
INT0IF
UDIS
Bit 1
DT1
—
—
—
—
PMOD0
OSYNC
POVD0
POUT0
DS39758D-page 145
RBIF
Bit 0
DT0
—
—
—
—
on Page:
Values
Reset
47
49
49
49
49
49
49
49
49
49
49
50
50
50
50
49
50
50
49
49
49
49
49
49
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