PIC18LF1330-I/ML Microchip Technology, PIC18LF1330-I/ML Datasheet - Page 75
![Microcontroller](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF1330-I/ML
Manufacturer Part Number
PIC18LF1330-I/ML
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
Specifications of PIC18LF1330-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- Current page: 75 of 318
- Download datasheet (3Mb)
7.3
The TBLRD instruction is used to retrieve data from
program memory and places it into data RAM. Table
reads from program memory are performed one byte at
a time.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified
automatically for the next table read operation.
FIGURE 7-4:
EXAMPLE 7-1:
2009 Microchip Technology Inc.
READ_WORD
Instruction Register
Reading the Flash Program
Memory
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
TBLRD*+
MOVF
MOVWF
TBLRD*+
MOVF
MOVWF
(IR)
READS FROM FLASH PROGRAM MEMORY
READING A FLASH PROGRAM MEMORY WORD
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
TABLAT, W
WORD_EVEN
TABLAT, W
WORD_ODD
(Even Byte Address)
FETCH
Program Memory
; Load TBLPTR with the base
; address of the word
; read into TABLAT and increment
; get data
; read into TABLAT and increment
; get data
(Odd Byte Address)
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word. Figure 7-4
shows the interface between the internal program
memory and the TABLAT.
TBLPTR = xxxxx1
TBLRD
PIC18F1230/1330
Read Register
TABLAT
TBLPTR = xxxxx0
DS39758D-page 75
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