PIC18LF1330-I/ML Microchip Technology, PIC18LF1330-I/ML Datasheet - Page 196
![Microcontroller](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF1330-I/ML
Manufacturer Part Number
PIC18LF1330-I/ML
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
Specifications of PIC18LF1330-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- Current page: 196 of 318
- Download datasheet (3Mb)
PIC18F1230/1330
REGISTER 20-5:
DS39758D-page 196
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6-4
bit 3
bit 2-1
bit 0
MCLRE
R/P-1
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled, RA5 input pin disabled
0 = RA5 input pin enabled, MCLR pin disabled
Unimplemented: Read as ‘0’
T1OSCMX: T1OSO/T1CKI MUX bit
1 = T1OSO/T1CKI pin resides on RA6
0 = T1OSO/T1CKI pin resides on RB2
Unimplemented: Read as ‘0’
FLTAMX: FLTA MUX bit
1 = FLTA is muxed onto RA5
0 = FLTA is muxed onto RA7
U-0
—
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
P = Programmable bit
U-0
—
U-0
—
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
T1OSCMX
R/P-0
U-0
—
2009 Microchip Technology Inc.
U-0
—
FLTAMX
R/P-1
bit 0
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