AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 65

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Addr
Status Readback (These registers are read only and are accessible during EEPROM transactions.)
0x0D00
0x0D01
0x0D02
0x0D03
0x0D04
0x0D05
0x0D06
0x0D07
0x0D08
0x0D09
0x0D0A
0x0D0B
0x0D0C
0x0D0
D
0x0D0E
0x0D0F
0x0D10
0x0D11
0x0D12
0x0D13
0x0D14
0x0D15
0x0D16
0x0D17
0x0D18
0x0D19
Nonvolatile Memory (EEPROM) Control
0x0E00
0x0E01
0x0E02
0x0E03
EEPROM Storage Sequence
0x0E10
0x0E11
0x0E12
0x0E13
0x0E14
0x0E15
0x0E16
0x0E17
0x0E18
Opt
R
R
R
R
R
R
R
R
R
R
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
R, C
E
A, E
A, E
E
E
E
E
E
E
E
E
E
1
Name
EEPROM
SYSCLK
IRQ monitor
DPLL status
Ref A input
reference
status
Ref AA input
reference
status
Ref B input
reference
status
Ref BB input
reference
status
Unused
Holdover
history
Write protect
Condition
Save
Load
SYSCLK
settings
I/O update
SYSCLK
calibration
General
configuration
settings
DPLL settings
D7
Switching
Ref AA
new profile
Ref BB
new profile
Offset slew
limiting
Frequency
clamped
Profile
selected
Profile
selected
Profile
selected
Profile
selected
Unused
D6
Closed
Ref AA
validated
Ref BB
validated
Phase
build-out
History
available
Unused
Unused
Unused
Unused
Selected profile[2:0]
Selected profile[2:0]
Selected profile[2:0]
Selected profile[2:0]
D5
SYSCLK
unlocked
Free run
Ref AA
fault cleared
Ref BB
fault cleared
Frequency
lock
Unused
Rev. B | Page 65 of 104
Active reference priority[2:0]
Unused
Unused
Action: calibrate system clock
D4
Stable
SYSCLK
locked
Holdover
History
updated
Ref AA fault
Ref BB
fault
Phase lock
Tuning word history[47:0]
Unused
Action: I/O update
Address: 0x0100
Address: 0x0200
Data: 21 bytes
Data: 28 bytes
Data: 9 bytes
Unused
Unused
D3
Distribution
sync
Frequency
unlocked
Frequency
unclamped
Ref A
new profile
Ref B
new profile
Loop
switching
Valid
Valid
Valid
Valid
Unused
Unused
Condition value[4:0]
D2
Fault
detected
Watchdog
timer
Frequency
locked
Frequency
clamped
Ref A
validated
Ref B
validated
Holdover
Fault
Fault
Fault
Fault
Unused
D1
Load in
progress
Cal
in progress
SYSCLK cal
complete
EEPROM
fault
Phase
unlocked
Phase slew
unlimited
Ref A
fault cleared
Ref B
fault cleared
Active
Fast
Fast
Fast
Fast
Half rate
mode
Load from
EEPROM
Active reference[1:0]
D0
Save in
progress
Lock
detected
SYSCLK cal
started
EEPROM
complete
Phase
locked
Phase slew
limited
Ref A
fault
Ref B
fault
Free
running
Slow
Slow
Slow
Slow
Write
enable
Save to
EEPROM
Unused
AD9547
Def
0x08
0x01
0x00
0x80
0xA0
0x14
0x02
0x00
0x1B
0x00
0x00
0x00
0x00

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