AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 99

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CALCULATING THE DIGITAL FILTER COEFFICIENTS
The digital loop filter coefficients (α, β, γ, and δ, as shown in
Figure 38) relate to the time constants (T
associated with the equivalent analog circuit for a third-order loop
filter (see Figure 64).
The design process begins by deciding on two design parameters
related to the second-order loop filter shown in Figure 65: the
desired open-loop bandwidth (f
An analysis of the second-order loop filter leads to its primary
time constant, T
of f
An analysis of the third-order loop filter leads to the definition
of another time constant, T
in terms of the desired amount of additional attenuation intro-
duced by R
from the PLL output frequency.
Note that ATTEN is the desired excess attenuation in decibels (dB).
Furthermore, ATTEN and ω
With an expression for T
open-loop bandwidth (f
shown that ω
in terms of T
P
and θ as
T
T
T
ω
1
3
3
C
=
=
=
1
ω
5
T
3
(
1
P
f
10
CHARGE
T
1
and C
P
T
1
cos(
ω
C
1
sin(
, T
3
FROM
Figure 65. Second-Order Analog Loop Filter
PUMP
ATTEN
+
OFFSET
(f
Figure 64. Third-Order Analog Loop Filter
+
CHARGE
10
T
1
C
3
. It can be shown that T
θ
, and θ (phase margin) as follows:
θ
(
3
T
expressed as a radian frequency) is expressible
FROM
)
3
PUMP
)
)
1
tan(
at some specified frequency offset (f
+
where ω
1
T
3
1
θ
C
)
where ω
and T
) that is slightly less than f
)
2
3
C1
. It can be shown that T
OFFSET
p
1
C1
= 2πf
3
+
, it is possible to define an adjusted
P
) and the phase margin (θ).
[
OFFSET
T
(
C2
T
should be chosen so that
1
T
1
P
R3
3
+
C2
C3
+
T
= 2πf
3
(
T
1
1
)
, T
tan(
is expressible in terms
1
TO
VCO
+
OFFSET
2
T
, and T
θ
3
TO
VCO
)
)
2
]
2
3
is expressible
P
. It can be
3
1
) that are
OFFSET
Rev. B | Page 99 of 104
)
It can also be shown that the adjusted open-loop bandwidth
leads to T
loop filter), which is expressed as
Calculation of the digital loop filter coefficients requires a
scaling constant, K (related to the system clock frequency, f
and the PLL feedback divide ratio, D.
where S, U, and V are the integer and fractional feedback divider
values that reside in the profile registers.
Keep in mind that the desired integer feedback divide ratio is one
more than the stored value of S (hence, the +1 term in the
equation for D in this equation). This leads to the digital filter
coefficients given by
Calculation of the coefficient register values requires the appli-
cation of some special functions, which are described as follows:
The if() function
where:
test_statement is a conditional expression (for example, x < 3).
true_value is what y equals if the conditional expression is true.
false_value is what y equals if the conditional expression is false.
The round() function
If x is an integer, then y = x. Otherwise, y is the nearest integer to x.
For example, round(2.1) = 2, round(2.5) = 3, and round(−3.1) = −3.
The ceil() function
If x is an integer, then y = x. Otherwise, y is the next integer to
the right on the number line. For example, ceil(2.8) = 3,
whereas ceil(−2.8) = −2.
y = if (test_statement, true_value, false_value)
y = round(x)
y = ceil(x)
T
α
γ
δ
K
D
β
2
=
=
=
=
=
=
=
f
ω
f
2
ω
S
32
S
S
30
32
C
f
T
T
(the secondary time constant of the second-order
T
32
C
S
+
2
1
3
1
2
,
T
K
517
(
U
V
2
T
D
1
1
T
1
2
+
1
+
,
33
578
1
T
(
1
3
T
)
1
+
,
2
125
(
ω
C
1
T
f
+
1
S
)
(
2
ω
)
(
C
1
T
+
2
)
(
2
ω
C
T
3
)
2
)
AD9547
S
),

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