IPR-SDRAM/DDR Altera, IPR-SDRAM/DDR Datasheet - Page 8
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IPR-SDRAM/DDR
Manufacturer Part Number
IPR-SDRAM/DDR
Description
IP CORE Renewal Of IP-SDRAM/DDR
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-SDRAM/DDR
Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
Cyclone, HardCopy, Stratix
Features
Data Mask Signals For Partial Write Operations, Bank Management Architecture
Core Architecture
FPGA
Core Sub-architecture
Cyclone, HardCopy, Stratix
Rohs Compliant
NA
Function
DDR SDRAM Controller
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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1–4
Performance and Resource Utilization
Table 1–4. Typical Size (Part 1 of 2)
DDR and DDR2 SDRAM Controller Compiler User Guide
Cyclone
Cyclone II
Device
f
Memory Width (Bits)
■
■
■
Table 1–3
Quartus II software version 9.0.
Table 1–3. Typical Performance
For more information on device performance, refer to the relevant device handbook.
Table 1–4
(ALUTs) for the DDR SDRAM controller.
Cyclone (EP1C20F400C6)
Cyclone II (EP2C35F672C6)
Stratix (EP1S25F780C5)
Stratix II (EP2S60F1020C3)
Stratix II GX (EP2SGX30CF780C3)
Note to
(1) For information on a solution that achieves speeds greater than 267 MHz (533 Mbps) up to 333 MHz (667 Mbps),
(2) Pending device characterization.
Burst lengths:
■
■
Banks:
■
■
Support for ODT in DDR2 SDRAM
contact your local Altera sales representative. To achieve speeds greater than 267 MHz, a new dynamic
autocalibration circuit is required.
16
32
16
32
64
72
2, 4, or 8, for DDR SDRAM
4, for DDR2 SDRAM
4 for DDR SDRAM
4 or 8 for DDR2 SDRAM
Table
shows typical performance results for the DDR SDRAM controller using the
shows typical sizes in logic elements (LEs) or adaptive look-up tables
1–3:
(Note 1)
Device
1,050
1,120
1,500
1,600
860
940
LEs
Combinational
ALUTs
—
—
—
—
—
—
Logic Registers
DDR SDRAM
200
133
167
200
200
—
—
—
—
—
—
(2)
System fMAX (MHz)
Performance and Resource Utilization
Chapter 1: About This Compiler
March 2009 Altera Corporation
M4K RAM Blocks
DDR2 SDRAM
267
267
167
(1) (2)
1
2
1
2
4
5
–
–
(1)
(2)
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