XR21V1410IL-0C-EB Exar Corporation, XR21V1410IL-0C-EB Datasheet - Page 19

Interface Modules & Development Tools For XR21V1410 QFN16 USB, RS485;No Cables

XR21V1410IL-0C-EB

Manufacturer Part Number
XR21V1410IL-0C-EB
Description
Interface Modules & Development Tools For XR21V1410 QFN16 USB, RS485;No Cables
Manufacturer
Exar Corporation
Series
-r

Specifications of XR21V1410IL-0C-EB

Interface Type
RS-232, USB
Operating Supply Voltage
3.3 V
Product
Interface Modules
Silicon Core Number
XR21V1410
Application Sub Type
UART
Kit Contents
Board
Main Purpose
Interface, USB 2.0 to UART
Embedded
No
Utilized Ic / Part
XR21V1410IL
Primary Attributes
-
Secondary Attributes
-
Silicon Manufacturer
Exar
Kit Application Type
Communication & Networking
For Use With/related Products
XR21V1410
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.2.0
FLOW_CONTROL[2:0]: Flow control mode select
FLOW_CONTROL[3]: Half-Duplex Mode
FLOW_CONTROL[7:4]: Reserved
These bits are reserved and should remain ’0’.
The XON_CHAR and XOFF_CHAR registers store the XON and XOFF characters, respectively, that are used
in the Automatic Software Flow control. If the V1410 is configured in multidrop mode, the XON_CHAR and
XOFF_CHAR registers are instead used for address matching.
XON_CHAR[7:0]: XON Character
In Automatic Software Flow control mode, the UART will resume data transmission when the XON character
has been received.
For behavior in the Address Match mode, see
page
XOFF_CHAR[7:0]: XOFF Character
In Automatic Software Flow control mode, the UART will suspend data transmission when the XOFF character
has been received.
For behavior in the Address Match mode, see
page
LOOPBACK_CTL[1:0]: Reserved
These bits are reserved and should remain ’0’.
LOOPBACK_CTL[2]: Enable
LOOPBACK_CTL[7:3]: Reserved
These bits are reserved and should remain ’0’.
3.3.7
3.3.8
Logic 0 = Normal (full-duplex) mode. The UART can transmit and receive data at the same time.
Logic 1 = Half-duplex Mode. In half-duplex mode, any data on the RX pin is ignored when the UART is
transmitting data.
Logic 0 = Internal UART (TX to RX) loopback is disabled.
Logic 1 = Internal UART (TX to RX) loopback is enabled.
9.
9.
M
ODE
0
1
2
3
4
XON_CHAR, XOFF_CHAR Register Descriptions (Read/Write)
LOOPBACK_CTL Register Descriptions (Read/Write)
B
IT
0
0
0
0
1
-2 B
IT
0
0
1
1
0
-1 B
IT
0
1
0
1
0
T
-0
ABLE
No flow control, no address matching.
HW flow control enabled. Auto RTS/CTS or DTR/DSR must be selected by
GPIO_MODE.
SW flow control enabled
Multidrop mode - RX only after address match, TX independent. (Typically
used with GPIO_MODE 3)
Multidrop mode - RX / TX only after address match. (Typically used with
GPIO_MODE 4)
13: F
LOW
“Section 1.5.7, Multidrop Mode with address matching” on
“Section 1.5.7, Multidrop Mode with address matching” on
C
ONTROL
19
M
ODE
M
ODE
S
ELECTION
D
ESCRIPTION
1-CH FULL-SPEED USB UART
XR21V1410

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