P0071 Terasic Technologies Inc, P0071 Datasheet - Page 53

• Manufacturer Part Number: P0071
• Description: TPAD MULTIMEDIADEVELOPMENT KIT
• Manufacturer: Terasic Technologies Inc
• Series: tPAD, Cyclone®IVr

Specifications of P0071

• Main Purpose: Reference Design, Tablet
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: EP4CE115
• Primary Attributes: 8-Inch TFT LCD, LED Backlight
• Secondary Attributes: 5-Megapixel Digital Image Sensor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VGA mode
Configuration
VGA(60Hz)
VGA(85Hz)
SVGA(60Hz)
SVGA(75Hz)
SVGA(85Hz)
XGA(60Hz)
XGA(70Hz)
XGA(85Hz)
1280x1024(60Hz)
VGA mode
Configuration
VGA(60Hz)
VGA(85Hz)
SVGA(60Hz)
SVGA(75Hz)
SVGA(85Hz)
XGA(60Hz)
XGA(70Hz)
XGA(85Hz)
1280x1024(60Hz)
Note: The RGB data bus on DE2-115 board is 8 bit instead of 10 bit on DE2/DE2-70 board.
Table 4-14 VGA Horizontal Timing Specification
Resolution(HxV)
640x480
640x480
800x600
800x600
800x600
1024x768
1024x768
1024x768
1280x1024
Resolution(HxV)
640x480
640x480
800x600
800x600
800x600
1024x768
1024x768
1024x768
1280x1024
Table 4-15 VGA Vertical Timing Specification
Figure 4-22 VGA horizontal timing specification
Vertical Timing Spec
a(lines)
2
3
4
3
3
6
6
3
3
Horizontal Timing Spec
a(us)
3.8
1.6
3.2
1.6
1.1
2.1
1.8
1.0
1.0
52
b(lines)
33
25
23
21
27
29
29
36
38
b(us)
1.9
2.2
2.2
3.2
2.7
2.5
1.9
2.2
2.3
c(lines)
480
480
600
600
600
768
768
768
1024
c(us)
25.4
17.8
20
16.2
14.2
15.8
13.7
10.8
11.9
d(lines)
10
1
1
1
1
3
3
1
1
d(us)
0.6
1.6
1
0.3
0.6
0.4
0.3
0.5
0.4
Pixel clock(MHz)
25
36
40
49
56
65
75
95
108
Pixel clock(MHz)
25
36
40
49
56
65
75
95
108