LFE2-50E-L-EV Lattice, LFE2-50E-L-EV Datasheet - Page 13

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LFE2-50E-L-EV

Manufacturer Part Number
LFE2-50E-L-EV
Description
MCU, MPU & DSP Development Tools ECP-2 Standard Eval Board
Manufacturer
Lattice
Datasheet

Specifications of LFE2-50E-L-EV

Processor To Be Evaluated
LatticeECP2
Interface Type
RS-232, Ethernet
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
Table 27. PCI Connections - Solder Side (Continued)
Note: PD = pull-down resistor, PU = pull-up resistor, NC = no-connect, TP = test point.
J48
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
GND
PCI_AD2
PCI_AD0
+3.3V
PCI_REQ64_N
NC
NC
GND
PCI_CBE7_N
PCI_CBE5_N
+3.3V
PAR64
PCI_AD62
GND
PCI_AD60
PCI_AD58
GND
PCI_AD56
PCI_AD54
+3.3V
PCI_AD52
PCI_AD50
GND
PCI_AD48
PCI_AD46
GND
PCI_AD44
PCI_AD42
+3.3V
PCI_AD40
PCI_AD38
GND
PCI_AD36
PCI_AD34
GND
PCI_AD32
NC
GND
NC
Signal Name
LatticeECP2 Pin
W13
W14
W15
W16
W17
W18
U14
V14
U15
Y15
U16
V16
Y16
Y17
Y18
Y19
Y20
V17
V18
U18
T15
T16
13
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LatticeECP2 Standard Evaluation Board
sysIO Bank
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
User’s Guide
Note

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