C8051F206DK-G Silicon Laboratories Inc, C8051F206DK-G Datasheet - Page 21

MCU, MPU & DSP Development Tools MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY

C8051F206DK-G

Manufacturer Part Number
C8051F206DK-G
Description
MCU, MPU & DSP Development Tools MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F206DK-G

Processor To Be Evaluated
C8051F206
Data Bus Width
8 bit
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADC data is continuously monitored by a programmable window detector, which interrupts the CPU when
data is within the user-programmed window. This allows the ADC to monitor key system voltages in back-
ground mode, without the use of CPU resources.
1.7.
The MCU's have two on-chip voltage comparators. The inputs of the comparators are available at pack-
age pins as illustrated in Figure 1.11. Each comparator's hysteresis is software programmable via special
function registers (SFR's). Both voltage level and positive/negative going symmetry can be easily pro-
grammed by the user. Additionally, comparator interrupts can be implemented on either rising or falling-
edge output transitions. Please see 8.‘Comparators” on page 52 for details.
port pin may be configured as
(only 22 input port pins on
AIN0-31 are port 0-3
pins -- any external
an analog input
Comparators
'F221)
AIN31
AIN0
AIN1
Figure 1.10. ADC Diagram
32-to-1
AMUX
Rev. 1.6
X
Programmable
Gain Amp
GND
+
-
Control & Data
SFR's
VDD
C8051F2xx
SFR Bus
100ksps
ADC
SAR
VREF
21

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