ITG-3200 INVENSENSE, ITG-3200 Datasheet - Page 23

IC, GYRO, TRI-AXIS, +/-2000 DEG/S

ITG-3200

Manufacturer Part Number
ITG-3200
Description
IC, GYRO, TRI-AXIS, +/-2000 DEG/S
Manufacturer
INVENSENSE
Datasheet

Specifications of ITG-3200

No. Of Axes
3
Sensor Case Style
QFN
No. Of Pins
24
Supply Voltage Range
2.1V To 3.6V
Operating Temperature Range
-40°C To +85°C
Interface
I2C, Serial
Interface Type
I2C, Serial
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ITG-3200
Manufacturer:
INVENSE
Quantity:
20 000
8
This section details each register within the InvenSense ITG-3200 gyroscope. Note that any bit that is not defined
should be set to zero in order to be compatible with future InvenSense devices.
The register space allows single-byte reads and writes, as well as burst reads and writes. When performing burst reads
or writes, the memory pointer will increment until either (1) reading or writing is terminated by the master, or (2) the
memory pointer reaches certain reserved registers between registers 33 and 60.
8.1
8.2
Register Description
Register 0 – Who Am I
Register 21 – Sample Rate Divider
Type: Read/Write
Description:
This register is used to verify the identity of the device.
Parameters:
ID
Type: Read/Write
Description:
This register determines the sample rate of the ITG-3200 gyros. The gyros outputs are sampled internally at
either 1kHz or 8kHz, determined by the DLPF_CFG setting (see register 22). This sampling is then filtered
digitally and delivered into the sensor registers after the number of cycles determined by this register. The
sample rate is given by the following formula:
As an example, if the internal sampling is at 1kHz, then setting this register to 7 would give the following:
Parameters:
SMPLRT_DIV
Register
Register
(Hex)
(Hex)
15
0
F
F
sample
sample
(Decimal)
(Decimal)
Register
Register
= F
= 1kHz / (7 + 1) = 125Hz, or 8ms per sample
21
0
Contains the I
The Power-On-Reset value of Bit6: Bit1 is 110 100.
Sample rate divider: 0 to 255
internal
/ (divider+1), where F
Bit7
Bit7
ITG-3200 Product Specification
-
2
C address of the device, which can also be changed by writing to this register.
Bit6
Bit6
internal
Bit5
Bit5
is either 1kHz or 8kHz
Bit4
SMPLRT_DIV
Bit4
ID
Bit3
Bit3
Document Number: PS-ITG-3200A-00-01.4
Revision: 1.4
Release Date: 03/30/2010
Bit2
Bit2
Bit1
Bit1
23 of 39
Bit0
Bit0
-
Default
Value
00h

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