AD8367ARUZ-RL7 Analog Devices Inc, AD8367ARUZ-RL7 Datasheet - Page 12

IC,Voltage Controlled Gain Amplifier,SINGLE,TSSOP,14PIN,PLASTIC

AD8367ARUZ-RL7

Manufacturer Part Number
AD8367ARUZ-RL7
Description
IC,Voltage Controlled Gain Amplifier,SINGLE,TSSOP,14PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
X-AMP®r
Type
Variable Gain Amplifierr
Datasheet

Specifications of AD8367ARUZ-RL7

Amplifier Type
Variable Gain
Number Of Circuits
1
-3db Bandwidth
500MHz
Current - Input Bias
27µA
Current - Supply
26mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Number Of Channels
1
Number Of Elements
1
Power Supply Requirement
Single
Voltage Gain Db
45dB
Input Resistance
0.000225@5VMohm
Input Bias Current
27@5VnA
Single Supply Voltage (typ)
3/5V
Dual Supply Voltage (typ)
Not RequiredV
Power Dissipation
250mW
Rail/rail I/o Type
No
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Current - Output / Channel
-
Slew Rate
-
Gain Bandwidth Product
-
Voltage - Input Offset
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8367ARUZ-RL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD8367
POWER AND VOLTAGE METRICS
Although power is the traditional metric used in the analysis
of cascaded systems, most active circuit blocks fundamentally
respond to voltage. The relationship between power and voltage
is defined by the impedance level. When input and output
impedance levels are the same, power gain and voltage gain
are identical. However, when impedance levels change between
input and output, they differ. Thus, one must be very careful to
use the appropriate gain for system chain analyses. Quantities
such as OIP3 are quoted in dBV rms as well as dBm referenced
to 200 Ω. The dBV rms unit is defined as decibels relative to
1 V rms. In a 200 Ω environment, the conversion from dBV rms
to dBm requires the addition of 7 dB to the dBV rms value. For
example, a 2 dBV rms level corresponds to 9 dBm.
NOISE AND DISTORTION
Since the AD8367 consists of a passive variable attenuator
followed by a fixed gain amplifier, the noise and distortion
characteristics as a function of the gain voltage are easily
predicted. The input-referred noise increases in proportion to
the attenuation level. Figure 30 shows noise figure, NF, as a
function of V
NF of 7.5 dB occurs at maximum gain and increases 1 dB for
every 1 dB reduction in gain. In receiver applications, the
minimum NF should occur at the maximum gain where the
received signal presumably is weak. At higher levels, a lower
gain is needed, and the increased NF becomes less important.
The input-referred distortion varies in a similar manner to the
noise. Figure 30 illustrates how the third-order intercept point
at the input, IIP3, behaves as a function of V
IIP3 of 20 dBV rms (27 dBm re 200 Ω) occurs at minimum
gain. The IIP3 then decreases 1 dB for every 1 dB increase in
gain. At lower levels, a degraded IIP3 is acceptable. Overall, the
dynamic range, represented by the difference between IIP3 and
NF, remains reasonably constant as a function of gain. The
output distortion and compression are essentially independent
of the gain. At low gains, when the input level is high, input
overload can occur, causing premature distortion.
INTEGRATOR
GAIN
Figure 29. A 50 Ω resistor is added to the
output to prevent package resonance.
FROM
for the MODE pin pulled high. The minimum
V
V
B1
B2
50Ω
GAIN
. The highest
V
OUT
Rev. A | Page 12 of 24
OUTPUT CENTERING
To maximize the ac swing at the output of the AD8367, the
output level is centered midway between ground and the supply.
This is achieved when the DECL pin is bypassed to ground via a
shunt capacitor. The loop acts to suppress deviations from the
reference at outputs below its corner frequency while not affect-
ing signals above it, as shown in Figure 31. The maximum
corner frequency with no external capacitor is 500 kHz. The
corner frequency can be lowered arbitrarily by adding an
external capacitor, C
A 100 Ω in series with the C
de-Q the resonant tank that is formed by the bond-wire
inductance and C
potentially cause oscillations at higher frequencies at high
gain settings.
Figure 31. The dc output level is centered to midsupply by a control loop
–10
–20
–30
f
60
50
40
30
20
10
0
HP
0
Figure 30. Noise Figure and Input Third-Order Intercept vs.
(kHz)
FROM
INPUT
0.1
whose corner frequency is determined by C
IIP3
NF
=
0.2
C
HP
HP
. Failure to insert this capacitor can
HP
0.3
(nF)
:
Gain (R
10
0.4
+
HPFL
R
C
AMPLIFIER
HP
g
0.02
HP
HP
V
m
SOURCE
GAIN
MAIN
capacitor is recommended to
0.5
(V)
DECL
= 200 Ω)
0.6
A
V
0.7
= 1
0.8
VOUT
V
HP
MID
0.9
.
1.0
60
50
40
30
20
10
0
–10
–20
–30
(3)

Related parts for AD8367ARUZ-RL7