AD8367ARUZ-RL7 Analog Devices Inc, AD8367ARUZ-RL7 Datasheet - Page 15

IC,Voltage Controlled Gain Amplifier,SINGLE,TSSOP,14PIN,PLASTIC

AD8367ARUZ-RL7

Manufacturer Part Number
AD8367ARUZ-RL7
Description
IC,Voltage Controlled Gain Amplifier,SINGLE,TSSOP,14PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
X-AMP®r
Type
Variable Gain Amplifierr
Datasheet

Specifications of AD8367ARUZ-RL7

Amplifier Type
Variable Gain
Number Of Circuits
1
-3db Bandwidth
500MHz
Current - Input Bias
27µA
Current - Supply
26mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Number Of Channels
1
Number Of Elements
1
Power Supply Requirement
Single
Voltage Gain Db
45dB
Input Resistance
0.000225@5VMohm
Input Bias Current
27@5VnA
Single Supply Voltage (typ)
3/5V
Dual Supply Voltage (typ)
Not RequiredV
Power Dissipation
250mW
Rail/rail I/o Type
No
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Current - Output / Channel
-
Slew Rate
-
Gain Bandwidth Product
-
Voltage - Input Offset
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8367ARUZ-RL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
VGA OPERATION
The AD8367 is a general-purpose VGA suitable for use in a
wide variety of applications where voltage control of gain is
needed. While having a 500 MHz bandwidth, its use is not
limited to high frequency signal processing. Its accurate,
temperature- and supply-stable linear-in-dB scaling is
valuable wherever it is important to have a more dependable
response to the control voltage than is usually offered by VGAs
of this sort. For example, there is no preclusion to its use in
speech-bandwidth systems.
Figure 33 shows the basic connections. The C
Pin HPFL can be used to alter the high-pass corner frequency of
the signal path and is associated with the offset control loop that
eliminates the inherent variation in the internal dc balance of the
signal path as the gain is varied (offset ripple). This frequency
should be chosen to be about a decade below the lowest frequency
component of the signal. If made much lower than necessary, the
offset loop is not able to track the variations that occur when there
are rapid changes in V
when the output is ac-coupled because of the potential reduction of
the upper and lower voltage range at this pin.
However, in many applications these components are
unnecessary because an internal network provides a default
high-pass corner of about 500 kHz. For C
modified corner is at ~10 kHz; it scales downward with
increasing capacitance. Figure 20 shows representative
response curves for the indicated component values.
MODULATED GAIN MODE
The AD8367 can be used as a means of modulating the signal
level. Keep in mind, however, that the gain is a nonlinear
(exponential) function of V
normal amplitude-modulation functions. The small signal
bandwidth of the gain interface is ~5 MHz, and the slew rate
is of the order of ±500 dB/μs. During gain slewing from close
to minimum to maximum gain (or vice versa), the internal
interpolation processes in an X-AMP-based VGA rapidly
scan the full range of gain values. The gain and offset ripple
associated with this process can cause transient disturbances
in the output. Therefore, it is inadvisable to use high amplitude
pulse drives with rise and fall times below 200 ns.
V
GAIN
V
IN
Figure 33. Basic Connections for Voltage Controlled Gain Mode
1
2
3
4
5
6
7
ICOM
ENBL
INPT
MODE
GAIN
DETO
ICOM
AD8367
GAIN
OCOM
. The control of offset is important even
VPSO
VOUT
DECL
ICOM
HPFL
VPSI
GAIN
14
13
12
11
10
9
8
; thus, it is not suitable for
1μF
10nF
C
C1
C5
10nF
HP
100Ω
R
HP
0.1μF
HP
C4
HP
= 1 nF, the
capacitor at
0.1μF
4.7Ω
C2
R6
VOUT
0.1μF
R5
4.7Ω
C3
V
Rev. A | Page 15 of 24
P
AGC OPERATION
The AD8367 can be used as an AGC amplifier, as shown in
Figure 34. For this application, the accurate internal, square-law
detector is employed. The output of this detector is a current
that varies in polarity, depending on whether the rms value of
the output is greater or less than its internally-determined
setpoint of 354 mV rms. This is 1 V p-p for sine-wave signals,
but the peak amplitude for other signals, such as Gaussian
noise, or those carrying complex modulation, is invariably
somewhat greater. However, for all waveforms having a crest
factor of <5, and when using a supply voltage of 4.5 V to 5.5 V,
the rms value is correctly measured and delivered at V
When using lower supplies, the rms value of V
(the setpoint is determined by a band gap reference), but the
peak crest factor capacity is reduced.
The gain pin is connected to the base of a transistor internally
and thus requires only 1 μA of current drive. The output of the
detector is delivered to Pin DETO. The detector can source up
to 60 μA and can sink up to 11 μA. For a sine-wave output
signal, and under conditions where the AGC loop is settled, the
detector output also takes the form of a sine-wave, but at twice
the frequency and having a mean value of 0. If the input to the
amplifier increases, the mean of this current also increases and
charges the external loop filter capacitor, C
positive voltages. Conversely, a reduction in V
setpoint of 354 mV rms causes this voltage to fall toward
ground. The capacitor voltage is the AGC bias; this can be
used as a received signal strength indicator (RSSI) output
and is scaled exactly as V
A valuable feature of using a square law detector is that the
RSSI voltage is a true reflection of signal power and can be
converted to an absolute power measurement for any given
source impedance. The AD8367 can thus be employed as a
true-power meter, or decibel-reading ac voltmeter, as distinct
from its basic amplifier function.
The AGC mode of operation requires that the correct gain
direction is chosen. Specifically, the gain must fall as V
increases to restore the needed balance against the setpoint.
Therefore, the MODE pin must be pulled low. This accurate
leveling function is shown in Figure 35, where the rms output is
V
AGC
V
C
0.1μF
IN
AGC
Figure 34. Basic Connections for AGC Operation
1
2
3
4
5
6
7
ICOM
ENBL
INPT
MODE
GAIN
DETO
ICOM
AD8367
OCOM
VPSO
VOUT
DECL
ICOM
HPFL
GAIN
VPSI
, that is, 20 mV/dB.
14
13
12
11
10
9
8
1μF
10nF
C
C1
C5
10nF
HP
100Ω
R
HP
0.1μF
C4
AGC
, toward more
OUT
OUT
0.1μF
4.7Ω
C2
R6
below the
VOUT
is unaffected
AD8367
OUT
AGC
R5
4.7Ω
0.1μF
C3
.
V
P

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