AD9272BSVZRL-40 Analog Devices Inc, AD9272BSVZRL-40 Datasheet - Page 12

• Manufacturer Part Number: AD9272BSVZRL-40
• Description: 12Bit 40 MSPS Octal ADC
• Manufacturer: Analog Devices Inc
• Type: Ultrasound Receiversr

Specifications of AD9272BSVZRL-40

• Design Resources: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
• Resolution (bits): 12 b
• Sampling Rate (per Second): 40M
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8V, 3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9272-65EBZ - BOARD EVAL AD9272
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9272
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
0
4, 10, 16, 22, 25, 50,
54, 60, 66, 72
3, 9, 15, 21, 55, 61,
67, 73, 86
26, 47
1
2
5
6
7
8
11
12
13
14
17
18
19
NOTES
1. THE EXPOSED PAD SHOULD BE TIED TO A QUIET ANALOG GROUND.
LOSW-G
LOSW-H
LOSW-F
Name
GND
AVDD1
AVDD2
DRVDD
LI-E
LG-E
LO-F
LOSW-F
LI-F
LG-F
LO-G
LOSW-G
LI-G
LG-G
LO-H
LOSW-H
LI-H
AVDD2
AVDD1
AVDD2
AVDD1
AVDD2
AVDD1
AVDD2
AVDD1
AVDD1
CLK–
CLK+
LO-G
LG-G
LO-H
LG-H
LG-E
LO-F
LG-F
LI-G
LI-H
LI-E
LI-F
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
PIN 1
INDICATOR
Description
Ground (exposed paddle should be tied to a quiet analog ground)
1.8 V Analog Supply
3.0 V Analog Supply
1.8 V Digital Output Driver Supply
LNA Analog Input for Channel E
LNA Ground for Channel E
LNA Analog Inverted Output for Channel F
LNA Analog Switched Output for Channel F
LNA Analog Input for Channel F
LNA Ground for Channel F
LNA Analog Inverted Output for Channel G
LNA Analog Switched Output for Channel G
LNA Analog Input for Channel G
LNA Ground for Channel G
LNA Analog Inverted Output for Channel H
LNA Analog Switched Output for Channel H
LNA Analog Input for Channel H
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
Figure 4. TQFP Pin Configuration
Rev. C | Page 12 of 44
(Not to Scale)
AD9272
TOP VIEW
75
74
73
72
71
70
69
68
67
66
65
63
62
61
60
59
58
57
56
55
54
53
52
51
64
LI-D
LG-D
AVDD2
AVDD1
LO-C
LOSW-C
LI-C
LG-C
AVDD2
AVDD1
LO-B
LOSW-B
LI-B
LG-B
AVDD2
AVDD1
LO-A
LOSW-A
LI-A
LG-A
AVDD2
AVDD1
CSB
SDIO
SCLK