ADUC7036DCPZ-RL Analog Devices Inc, ADUC7036DCPZ-RL Datasheet - Page 5

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ADUC7036DCPZ-RL

Manufacturer Part Number
ADUC7036DCPZ-RL
Description
SFlash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7036DCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-VFQFN Exposed Pad, CSP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Parameter
ADC SPECIFICATIONS ANALOG INPUT
Voltage Channel
Temperature Channel
Current Channel
Voltage Channel
Temperature Channel
Input Voltage Range
Input Leakage Current
Input Offset Current
Absolute Input Voltage Range
Input Voltage Range
VBAT Input Current
Absolute Input Voltage Range
Input Voltage Range
VTEMP Input Current
No Missing Codes
Integral Nonlinearity
Offset Error
Offset Error
Offset Error Drift
Total Gain Error
Total Gain Error
Gain Drift
Output Noise
No Missing Codes
Integral Nonlinearity
Offset Error
Offset Error
Offset Error Drift
Total Gain Error
Gain Drift
Output Noise
Absolute Input Voltage Range
3
1
3
1
,
,
,
,
5
3
4
3
1
1
,
13
,
5
1
12
, 16
1
1
,
3
,
,
, 15
,
3
3
14
, 7, 10, 14
,
1
1
7
, 10, 14
1
17 , 18
, 20
1
1
1
1
Test Conditions/Comments
Valid at all ADC update rates
Chop off, 1 LSB = 439.5 μV
Chop on
Chop off
Includes resistor mismatch
Temperature range = −25°C to +65°C
Includes resistor mismatch drift
4 Hz update rate, ADCFLT = 0xBF1D
10 Hz update rate, ADCFLT = 0x961F
1 kHz update rate, ADCFLT = 0x0007
1 kHz update rate, ADCFLT = 0x8101
1 kHz update rate, ADCFLT = 0x0101
8 kHz update rate, ADCFLT = 0x0000
Valid at all ADC update rates
Chop off, 1 LSB = 19.84 μV in unipolar mode
Chop on
Chop off
Using REG_AVDD as the reference
1 kHz update rate
Internal VREF = 1.2 V
Applies to both IIN+ and IIN−
Gain = 1
Gain = 2
Gain = 4
Gain = 8
Gain = 16
Gain = 32
Gain = 64
Gain = 128
Gain = 256
Gain = 512
VBAT = 18 V
VREF = (REG_AVDD and GND_SW)/2
19
19
19
Rev. C | Page 5 of 132
Min
16
−10
−0.25
−0.15
16
−10
−5
−0.2
−200
−3
4
3
100
Typ
±10
±1
0.3
0.03
±0.06
±0.03
3
60
60
180
240
270
1600
±10
±3
+1
0.03
±0.06
3
7.5
±1.2
±600
±300
±150
±75
±37.5
±18.75
±9.375
±4.68
±2.3
0.5
0 to 28.8
5.5
0 to
VREF
2.5
Max
±60
+10
1
+0.25
+0.15
90
90
270
307
405
2400
±60
+10
+5
+0.2
11.25
+300
+3
1.5
18
8
1300
100
ADuC7036
Bits
ppm of FSR
LSB
LSB
LSB/°C
%
%
ppm/°C
μV rms
μV rms
μV rms
μV rms
μV rms
μV rms
Bits
ppm of FSR
LSB
LSB
LSB/°C
%
ppm/°C
μV rms
mV
V
mV
mV
mV
mV
mV
mV
mV
mV
mV
nA
nA
V
V
mV
V
nA
Unit
μA

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