ADUC7060BSTZ32 Analog Devices Inc, ADUC7060BSTZ32 Datasheet - Page 50

DUAL 24-BIT AFE AND ARM 7 I.C

ADUC7060BSTZ32

Manufacturer Part Number
ADUC7060BSTZ32
Description
DUAL 24-BIT AFE AND ARM 7 I.C
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheets

Specifications of ADUC7060BSTZ32

Design Resources
4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145) Low power, Long Range, ISM Wireless Measuring Node (CN0164)
Core Processor
ARM7
Core Size
16/32-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
14
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 2.625 V
Data Converters
A/D 5x24b, 8x24b, D/A 1x14b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Cpu Family
ADuC7xxx
Device Core
ARM7TDMI
Device Core Size
16/32Bit
Frequency (max)
10.24MHz
Interface Type
I2C/SPI/UART
Total Internal Ram Size
4KB
# I/os (max)
14
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.625V
Operating Supply Voltage (min)
2.375V
On-chip Adc
2(4-chx24-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
ADuC7xxx
Maximum Speed
10.24 MHz
Operating Supply Voltage
2.5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
14
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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ADuC7060/ADuC7061
Primary Channel ADC Data Register
Name:
Address:
Default value:
Access:
Function:
Table 49. ADC0DAT MMR Bit Designations
Bit
23:0
Auxiliary Channel ADC Data Register
Name:
Address:
Default value:
Access:
Function:
Table 50. ADC1DAT MMR Bit Designations
Bit
23:0
ADC0DAT
0xFFFF051C
0x00000000
Read only
This ADC data MMR holds the 24-bit
conversion result from the primary ADC. The
ADC does not update this MMR if the ADC0
conversion result ready bit (ADCSTA[0]) is
set. A read of this MMR by the MCU clears
all asserted ready flags (ADCSTA[1:0]).
ADC1DAT
0xFFFF0520
0x00000000
Read only
This ADC data MMR holds the 24-bit
conversion result from the auxiliary ADC.
The ADC does not update this MMR if the
ADC0 conversion result ready bit
(ADCSTA[1]) is set.
Description
ADC0 24-bit conversion result.
Description
ADC1 24-bit conversion result.
Rev. C | Page 50 of 108
Primary Channel ADC Offset Calibration Register
Name:
Address:
Default value:
Access:
Function:
Table 51. ADC0OF MMR Bit Designations
Bit
15:0
Auxiliary Channel ADC Offset Calibration Register
Name:
Address:
Default value:
Access:
Function:
Description
ADC0 16-bit offset calibration value.
ADC0OF
Part specific, factory programmed
Read and write
This ADC offset MMR holds a 16-bit offset
calibration coefficient for the primary ADC.
The register is configured at power-on with a
factory default value. However, this register
automatically overwrites if an offset
calibration of the primary ADC is initiated by
the user via bits in the ADCMDE MMR. User
code can write to this calibration register only
if the ADC is in idle mode. An ADC must be
enabled and in idle mode before being
written to any offset or gain register. The
ADC must be in idle mode for at least 23 μs.
ADC1OF
Part specific, factory programmed
Read and write
This offset MMR holds a 16-bit offset
calibration coefficient for the auxiliary
channel. The register is configured at power-
on with a factory default value. However, this
register is automatically overwritten if an
offset calibration of the auxiliary channel is
initiated by the user via bits in the ADCMDE
MMR. User code can write to this calibration
register only if the ADC is in idle mode. An
ADC must be enabled and in idle mode
before being written to any offset or gain
register. The ADC must be in idle mode for
at least 23 μs.
0xFFFF0524
0xFFFF0528

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