CY7C68013A-56LTXCT Cypress Semiconductor Corp, CY7C68013A-56LTXCT Datasheet - Page 3

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CY7C68013A-56LTXCT

Manufacturer Part Number
CY7C68013A-56LTXCT
Description
CY7C68013A-56LTXCT
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r

Specifications of CY7C68013A-56LTXCT

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
24
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
Processor Series
CY7C68xx
Core
8051
Development Tools By Supplier
CY3684
Package
56QFN EP
Device Core
8051
Family Name
FX2LP
Maximum Speed
48 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
24
Interface Type
I2C/USART/USB
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
Lead Free Status / Rohs Status
 Details
Contents
Applications ...................................................................... 4
Functional Overview ........................................................ 4
Pin Assignments ............................................................ 15
Register Summary .......................................................... 30
Absolute Maximum Ratings .......................................... 37
Operating Conditions ..................................................... 37
Thermal Characteristics ................................................. 37
DC Characteristics ......................................................... 38
AC Electrical Characteristics ........................................ 39
Document #: 38-08032 Rev. *U
USB Signaling Speed .................................................. 4
8051 Microprocessor ................................................... 4
I
Buses .......................................................................... 4
USB Boot Methods ...................................................... 5
ReNumeration ............................................................. 5
Bus-Powered Applications .......................................... 5
Interrupt System .......................................................... 5
Reset and Wakeup ...................................................... 7
Program/Data RAM ..................................................... 8
Register Addresses ................................................... 10
Endpoint RAM ........................................................... 11
External FIFO Interface ............................................. 12
GPIF .......................................................................... 13
ECC Generation
USB Uploads and Downloads ................................... 13
Autopointer Access ................................................... 13
I
Compatible with Previous Generation EZ-USB FX2 . 14
CY7C68013A/14A and CY7C68015A/16A Differences 14
CY7C68013A/15A Pin Descriptions .......................... 22
USB Transceiver ....................................................... 38
USB Transceiver ....................................................... 39
Program Memory Read ............................................. 39
2
2
C Bus ........................................................................ 4
C Controller ............................................................. 14
[7] ................................................................... 13
Ordering Information ...................................................... 55
Package Diagrams .......................................................... 56
PCB Layout Recommendations .................................... 62
Quad Flat Package No Leads (QFN) Package
Design Notes ................................................................... 63
Acronyms ........................................................................ 64
Document Conventions ................................................. 64
Document History Page ................................................. 65
Sales, Solutions, and Legal Information ...................... 67
Data Memory Read ................................................... 40
Data Memory Write ................................................... 41
PORTC Strobe Feature Timings ............................... 42
GPIF Synchronous Signals ....................................... 43
Slave FIFO Synchronous Read ................................. 44
Slave FIFO Asynchronous Read ............................... 45
Slave FIFO Synchronous Write ................................. 46
Slave FIFO Asynchronous Write ............................... 47
Slave FIFO Synchronous Packet End Strobe ........... 47
Slave FIFO Asynchronous Packet End Strobe ......... 48
Slave FIFO Output Enable ........................................ 49
Slave FIFO Address to Flags/Data ............................ 49
Slave FIFO Synchronous Address ............................ 49
Slave FIFO Asynchronous Address .......................... 50
Sequence Diagram .................................................... 50
Ordering Code Definitions ......................................... 55
Units of Measure ....................................................... 64
Worldwide Sales and Design Support ....................... 67
Products .................................................................... 67
PSoC Solutions ......................................................... 67
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Page 3 of 67
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