CY7C68013A-56LTXCT Cypress Semiconductor Corp, CY7C68013A-56LTXCT Datasheet - Page 44

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CY7C68013A-56LTXCT

Manufacturer Part Number
CY7C68013A-56LTXCT
Description
CY7C68013A-56LTXCT
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r

Specifications of CY7C68013A-56LTXCT

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
24
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
Processor Series
CY7C68xx
Core
8051
Development Tools By Supplier
CY3684
Package
56QFN EP
Device Core
8051
Family Name
FX2LP
Maximum Speed
48 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
24
Interface Type
I2C/USART/USB
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
Lead Free Status / Rohs Status
 Details
9.1 Slave FIFO Synchronous Read
Table 19. Slave FIFO Synchronous Read Parameters with Internally Sourced IFCLK
Document #: 38-08032 Rev. *U
t
t
t
t
t
t
t
t
t
t
t
IFCLK
SRD
RDH
OEon
OEoff
XFLG
XFD
IFCLKR
IFCLKF
IFCLKOD
IFCLKJ
Parameter
IFCLK period
SLRD to clock setup time
Clock to SLRD hold time
SLOE turn on to FIFO data valid
SLOE turn off to FIFO data hold
Clock to FLAGS output propagation delay
Clock to FIFO data output propagation delay
IFCLK rise time
IFCLK fall time
IFCLK Output duty cycle
IFCLK jitter peak to peak
FLAGS
SLOE
SLRD
DATA
IFCLK
Figure 9-7. Slave FIFO Synchronous Read Timing Diagram
Description
t
OEon
N
t
SRD
t
IFCLK
t
20.83
RDH
18.7
Min
t
0
XFLG
t
XFD
N+1
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
t
OEoff
Max
10.5
10.5
9.5
11
[21]
[20]
Min
49
Typ
Max
900
900
300
51
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Unit
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
%
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