CY7C68013A-56LTXCT Cypress Semiconductor Corp, CY7C68013A-56LTXCT Datasheet - Page 46

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CY7C68013A-56LTXCT

Manufacturer Part Number
CY7C68013A-56LTXCT
Description
CY7C68013A-56LTXCT
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r

Specifications of CY7C68013A-56LTXCT

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
24
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
Processor Series
CY7C68xx
Core
8051
Development Tools By Supplier
CY3684
Package
56QFN EP
Device Core
8051
Family Name
FX2LP
Maximum Speed
48 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
24
Interface Type
I2C/USART/USB
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
Lead Free Status / Rohs Status
 Details
9.9 Slave FIFO Synchronous Write
Table 22. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK
Table 23. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK
Document #: 38-08032 Rev. *U
t
t
t
t
t
t
t
t
t
t
t
t
IFCLK
SWR
WRH
SFD
FDH
XFLG
IFCLK
SWR
WRH
SFD
FDH
XFLG
Parameter
Parameter
IFCLK period
SLWR to clock setup time
Clock to SLWR hold time
FIFO data to clock setup time
Clock to FIFO data hold time
Clock to FLAGS output propagation time
IFCLK Period
SLWR to clock setup time
Clock to SLWR hold time
FIFO data to clock setup time
Clock to FIFO data hold time
Clock to FLAGS output propagation time
FLAGS
IFCLK
Figure 9-9. Slave FIFO Synchronous Write Timing Diagram
SLWR
DATA
Z
Description
Description
t
SWR
t
SFD
t
IFCLK
t
WRH
t
N
t
XFLG
FDH
20.83
20.83
10.4
12.1
Min
Min
9.2
3.6
3.2
4.5
0
0
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Z
[21]
[21]
[20]
Max
Max
13.5
200
9.5
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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