DSPIC33FJ16GP101-I/SS Microchip Technology, DSPIC33FJ16GP101-I/SS Datasheet - Page 48
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DSPIC33FJ16GP101-I/SS
Manufacturer Part Number
DSPIC33FJ16GP101-I/SS
Description
16-bit DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP101-IP.pdf
(322 pages)
Specifications of DSPIC33FJ16GP101-I/SS
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Details
- Current page: 48 of 322
- Download datasheet (5Mb)
TABLE 4-11:
TABLE 4-12:
SFR Name
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
Legend:
SPI1STAT
SPI1CON1
SPI1CON2
SPI1BUF
Legend:
Name
SFR
Addr
Addr
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
0240
0242
0244
0248
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
0220
0222
0224
0226
0228
SFR
SFR
UART1 REGISTER MAP
SPI1 REGISTER MAP
FRMEN
UTXISEL1
SPIEN
UARTEN
Bit 15
Bit 15
—
—
—
SPIFSD
UTXINV UTXISEL0
Bit 14
Bit 14
—
—
—
—
—
FRMPOL
Bit 13
USIDL
SPISIDL
Bit 13
—
—
—
DISSCK
Bit 12
IREN
Bit 12
—
—
—
—
—
UTXBRK
RTSMD
DISSDO
Bit 11
Bit 11
—
—
—
—
UTXEN
MODE16
Bit 10
Bit 10
—
—
—
—
—
UTXBF
SPI1 Transmit and Receive Buffer Register
UEN1
Bit 9
Bit 9
—
—
SMP
—
—
Baud Rate Generator Prescaler
UEN0
TRMT
Bit 8
Bit 8
CKE
—
—
WAKE
Bit 7
URXISEL<1:0>
SSEN
Bit 7
—
—
LPBACK
SPIROV
Bit 6
Bit 6
CKP
—
ABAUD
ADDEN
MSTEN
Bit 5
Bit 5
UART Transmit Register
UART Receive Register
—
—
URXINV
RIDLE
Bit 4
Bit 4
—
—
SPRE<2:0>
BRGH
PERR
Bit 3
Bit 3
—
—
FERR
Bit 2
Bit 2
PDSEL<1:0>
—
—
FRMDLY
OERR
SPITBF
Bit 1
Bit 1
PPRE<1:0>
URXDA
STSEL
SPIRBF
Bit 0
Bit 0
—
Resets
Resets
0000
0110
xxxx
0000
0000
0000
0000
0000
0000
All
All
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